| Message ID | 20200921143941.13905-2-rogerq@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: ti: Add USB support for J7200 EVM | expand |
On 17:39-20200921, Roger Quadros wrote: > There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can > select upto 4 different IPs. Define all the possible functions. > > Cc: Peter Rosin <peda@axentia.se> > Signed-off-by: Roger Quadros <rogerq@ti.com> > --- > include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h > index 146d0685a925..9047ec6bd3cf 100644 > --- a/include/dt-bindings/mux/ti-serdes.h > +++ b/include/dt-bindings/mux/ti-serdes.h > @@ -68,4 +68,26 @@ > #define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2 > #define J721E_SERDES4_LANE3_IP4_UNUSED 0x3 > > +/* J7200 */ > + > +#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0 > +#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1 > +#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0 > +#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1 > +#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0 > +#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1 > +#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0 > +#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1 > +#define J7200_SERDES0_LANE3_USB 0x2 > +#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3 > + > #endif /* _DT_BINDINGS_MUX_TI_SERDES */ > -- > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki > I recommend Peter's ack before we take this series in.
On Mon, 21 Sep 2020 17:39:36 +0300, Roger Quadros wrote: > There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can > select upto 4 different IPs. Define all the possible functions. > > Cc: Peter Rosin <peda@axentia.se> > Signed-off-by: Roger Quadros <rogerq@ti.com> > --- > include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > Acked-by: Rob Herring <robh@kernel.org>
Hi! On 2020-09-21 16:39, Roger Quadros wrote: > There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can > select upto 4 different IPs. Define all the possible functions. > > Cc: Peter Rosin <peda@axentia.se> > Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Peter Rosin <peda@axentia.se> Thanks for taking care of this! Cheers, Peter > --- > include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h > index 146d0685a925..9047ec6bd3cf 100644 > --- a/include/dt-bindings/mux/ti-serdes.h > +++ b/include/dt-bindings/mux/ti-serdes.h > @@ -68,4 +68,26 @@ > #define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2 > #define J721E_SERDES4_LANE3_IP4_UNUSED 0x3 > > +/* J7200 */ > + > +#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0 > +#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1 > +#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0 > +#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1 > +#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0 > +#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1 > +#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2 > +#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3 > + > +#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0 > +#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1 > +#define J7200_SERDES0_LANE3_USB 0x2 > +#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3 > + > #endif /* _DT_BINDINGS_MUX_TI_SERDES */ >
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h index 146d0685a925..9047ec6bd3cf 100644 --- a/include/dt-bindings/mux/ti-serdes.h +++ b/include/dt-bindings/mux/ti-serdes.h @@ -68,4 +68,26 @@ #define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2 #define J721E_SERDES4_LANE3_IP4_UNUSED 0x3 +/* J7200 */ + +#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0 +#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1 +#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2 +#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3 + +#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0 +#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1 +#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2 +#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3 + +#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0 +#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1 +#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2 +#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3 + +#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0 +#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1 +#define J7200_SERDES0_LANE3_USB 0x2 +#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3 + #endif /* _DT_BINDINGS_MUX_TI_SERDES */
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Cc: Peter Rosin <peda@axentia.se> Signed-off-by: Roger Quadros <rogerq@ti.com> --- include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)