From patchwork Tue Oct 13 10:32:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Billy Tsai X-Patchwork-Id: 11835381 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BE8192C for ; Tue, 13 Oct 2020 10:36:10 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D091D20870 for ; Tue, 13 Oct 2020 10:36:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="2HWvkWlC"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=infradead.org header.i=@infradead.org header.b="U+guyJE5" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D091D20870 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vsRntDRfhoxxe9bEjZvm2BHPQqGsms9+7EkNuD+nfJI=; b=2HWvkWlCjSvFjXE2IN7TDiALy uKgTU7hLZOVKbxdPoi+9ba9WAd30gHZH9zN1LpY6ye5HmzKsG8E/TXeg7zElB1HuhrlMSNYThFl3w jXnSjY490AXYfowDQ2FO5+7ta+BQNR8kJzZAZG9LADEssrIqGS4ePqm61GA0MdMxnk7169kpU2FK5 K5i5IYq2H/zZHMkc8juADSnboeJphJ5T99L53FPDHbVeSubxAWzUJC69UrO8LgbH9koKUucHLLdKR jjR6Eb1DfTogJFzWl8hu4N/PW4i683wppVHfzHr5DGxyEqCQkgnSaJqovsMZRtiMcGFghEgCQHgAt XjHuwyFHQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHdj-00045X-Ke; Tue, 13 Oct 2020 10:34:43 +0000 Received: from casper.infradead.org ([2001:8b0:10b:1236::1]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHdh-00044l-KP for linux-arm-kernel@merlin.infradead.org; Tue, 13 Oct 2020 10:34:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=BJI6DpCi3I2Wh1OQRC2i8jUpiHsXc/R0KSLDZdyloZs=; b=U+guyJE5IDRTppc/vW3G2T178y /hT46ocEKLODw1cixcQAbdJ2uETpKAVtwJYZcDMncpvcY6NU/E5IZ1Pr4Q7gIaUGRsrei+mAKY3RJ q+9TAlAR4CZhWskRBg67yJ5bPfo9KHmIEZyY96yEvQALz/bE6lSu3cc+zM3e52wJCfPW5So1xPkds Efw0Q5psWviA5795vTO8lT9lnCPkfdZfazF/VHf6hpLJK2ieXMijphu1y7/82d6JFcehQR0wAWbn5 5vpbBlcAUo/wfBzUAcr0vYdDy3kZ3Imfp+IBGzExaJPPUYQS8PBm+Bm1OWiNejSBzuDj58byOIMZP RQPaabcw==; Received: from twspam01.aspeedtech.com ([211.20.114.71]) by casper.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kSHck-0006qI-8C for linux-arm-kernel@lists.infradead.org; Tue, 13 Oct 2020 10:34:40 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 09DAUguY010592; Tue, 13 Oct 2020 18:30:42 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Received: from localhost.localdomain (192.168.10.9) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 13 Oct 2020 18:32:57 +0800 From: Billy Tsai To: , , , , , , , , , , , , , , Subject: [PATCH 1/3] iio: adc: aspeed: Orgnaize and add the define of adc Date: Tue, 13 Oct 2020 18:32:43 +0800 Message-ID: <20201013103245.16723-2-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201013103245.16723-1-billy_tsai@aspeedtech.com> References: <20201013103245.16723-1-billy_tsai@aspeedtech.com> MIME-Version: 1.0 X-Originating-IP: [192.168.10.9] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 09DAUguY010592 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201013_113344_590673_956EA544 X-CRM114-Status: UNSURE ( 8.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.4 on casper.infradead.org summary: Content analysis details: (-1.9 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 SPF_FAIL SPF: sender does not match SPF record (fail) [SPF failed: Please see http://www.openspf.org/Why?s=mfrom; id=billy_tsai%40aspeedtech.com; ip=211.20.114.71; r=casper.infradead.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: BMC-SW@aspeedtech.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch organizes the define of adc to multiple partitions and adds the new bit field define for ast2600 driver. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 42 ++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index 1e5375235cfe..ae400c4d6d40 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -21,23 +21,57 @@ #include #include +/********************************************************** + * ADC feature define + *********************************************************/ #define ASPEED_RESOLUTION_BITS 10 #define ASPEED_CLOCKS_PER_SAMPLE 12 +/********************************************************** + * ADC HW register offset define + *********************************************************/ #define ASPEED_REG_ENGINE_CONTROL 0x00 #define ASPEED_REG_INTERRUPT_CONTROL 0x04 #define ASPEED_REG_VGA_DETECT_CONTROL 0x08 #define ASPEED_REG_CLOCK_CONTROL 0x0C +#define ASPEED_REG_COMPENSATION_TRIM 0xC4 #define ASPEED_REG_MAX 0xC0 +/********************************************************** + * ADC register Bit field + *********************************************************/ +/*ENGINE_CONTROL */ +/* [0] */ +#define ASPEED_ENGINE_ENABLE BIT(0) +/* [3:1] */ #define ASPEED_OPERATION_MODE_POWER_DOWN (0x0 << 1) #define ASPEED_OPERATION_MODE_STANDBY (0x1 << 1) #define ASPEED_OPERATION_MODE_NORMAL (0x7 << 1) - -#define ASPEED_ENGINE_ENABLE BIT(0) - +/* [4] */ +#define ASPEED_CTRL_COMPENSATION BIT(4) +/* [5] */ +#define ASPEED_AUTOPENSATING BIT(5) +/* [7:6] */ +#define ASPEED_REF_VOLTAGE_2500mV (0 << 6) +#define ASPEED_REF_VOLTAGE_1200mV (1 << 6) +#define ASPEED_REF_VOLTAGE_EXT_HIGH (2 << 6) +#define ASPEED_REF_VOLTAGE_EXT_LOW (3 << 6) +#define ASPEED_BATTERY_SENSING_VOL_DIVIDE_2_3 (0 << 6) +#define ASPEED_BATTERY_SENSING_VOL_DIVIDE_1_3 (1 << 6) +/* [8] */ #define ASPEED_ADC_CTRL_INIT_RDY BIT(8) - +/* [12] */ +#define ASPEED_ADC_CH7_VOLTAGE_NORMAL (0 << 12) +#define ASPEED_ADC_CH7_VOLTAGE_BATTERY (1 << 12) +/* [13] */ +#define ASPEED_ADC_EN_BATTERY_SENSING BIT(13) +/* [31:16] */ +#define ASPEED_ADC_CTRL_CH_EN(n) (1 << (16 + n)) +#define ASPEED_ADC_CTRL_CH_EN_ALL GENMASK(31, 16) + +/********************************************************** + * Software setting + *********************************************************/ #define ASPEED_ADC_INIT_POLLING_TIME 500 #define ASPEED_ADC_INIT_TIMEOUT 500000