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[82.127.142.33]) by smtp.gmail.com with ESMTPSA id f7sm24885193wrx.64.2020.10.26.11.52.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2020 11:52:49 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , Mark Brown , Liam Girdwood Subject: [PATCH v8 06/14] ASoC: sun4i-i2s: Fix sun8i volatile regs Date: Mon, 26 Oct 2020 19:52:31 +0100 Message-Id: <20201026185239.379417-7-peron.clem@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201026185239.379417-1-peron.clem@gmail.com> References: <20201026185239.379417-1-peron.clem@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201026_145251_440640_5605EE4D X-CRM114-Status: GOOD ( 15.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Jernej Skrabec , alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Takashi Iwai , Jaroslav Kysela , Marcus Cooper , linux-sunxi@googlegroups.com, =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The FIFO TX reg is volatile and sun8i i2s register mapping is different from sun4i. Even if in this case it's doesn't create an issue, Avoid setting some regs that are undefined in sun8i. Acked-by: Maxime Ripard Reviewed-by: Chen-Yu Tsai Signed-off-by: Clément Péron --- sound/soc/sunxi/sun4i-i2s.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index eee1e64cd8f4..dee8688f0d37 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -1161,12 +1161,19 @@ static bool sun8i_i2s_rd_reg(struct device *dev, unsigned int reg) static bool sun8i_i2s_volatile_reg(struct device *dev, unsigned int reg) { - if (reg == SUN8I_I2S_INT_STA_REG) + switch (reg) { + case SUN4I_I2S_FIFO_CTRL_REG: + case SUN4I_I2S_FIFO_RX_REG: + case SUN4I_I2S_FIFO_STA_REG: + case SUN4I_I2S_RX_CNT_REG: + case SUN4I_I2S_TX_CNT_REG: + case SUN8I_I2S_FIFO_TX_REG: + case SUN8I_I2S_INT_STA_REG: return true; - if (reg == SUN8I_I2S_FIFO_TX_REG) - return false; - return sun4i_i2s_volatile_reg(dev, reg); + default: + return false; + } } static const struct reg_default sun4i_i2s_reg_defaults[] = {