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Mon, 26 Oct 2020 18:27:23 -0500 Received: from lelv0597.itg.ti.com (lelv0597.itg.ti.com [10.181.64.32]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 09QNRNTP118934; Mon, 26 Oct 2020 18:27:23 -0500 Received: from localhost ([10.250.39.72]) by lelv0597.itg.ti.com (8.14.7/8.14.7) with ESMTP id 09QNRNQc032566; Mon, 26 Oct 2020 18:27:23 -0500 From: Suman Anna To: Nishanth Menon , Tero Kristo Subject: [PATCH 1/3] arm64: dts: ti: k3-j7200-main: Add hwspinlock node Date: Mon, 26 Oct 2020 18:26:35 -0500 Message-ID: <20201026232637.15681-2-s-anna@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201026232637.15681-1-s-anna@ti.com> References: <20201026232637.15681-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201026_192726_322123_963C02C5 X-CRM114-Status: GOOD ( 12.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Main NavSS block on J7200 SoCs contains a HwSpinlock IP instance that is same as the IP on AM65x and J721E SoCs. Add the DT node for this on J7200 SoCs. The node is present within the Main NavSS block, and is added as a child node under the main_navss interconnect node. Signed-off-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 72d6496e88dd..4c53a3036066 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -115,6 +115,12 @@ secure_proxy_main: mailbox@32c00000 { interrupts = ; }; + hwspinlock: spinlock@30e00000 { + compatible = "ti,am654-hwspinlock"; + reg = <0x00 0x30e00000 0x00 0x1000>; + #hwlock-cells = <1>; + }; + main_ringacc: ringacc@3c000000 { compatible = "ti,am654-navss-ringacc"; reg = <0x00 0x3c000000 0x00 0x400000>,