From patchwork Tue Oct 27 21:51:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 11861957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E26D4C388F9 for ; Tue, 27 Oct 2020 21:53:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 722E520759 for ; Tue, 27 Oct 2020 21:53:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WS6j8r7f"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="l/U0lij0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 722E520759 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=rpd6zU6BWpYPk2GrqwJcOkwbo0bc7Mh7XyEIjT78BEA=; b=WS6j8r7fYsre9Ozs3L8lYxoAn BVdOSPuO4kpsxmbGw4rFEu+NSlXaSZkMIRBsP77hXbv58tMqv4rURAsWy2t7f5ZzMyLbXGft4KwWV DyCGTGNJaeOwVnw3cpFKqTZb3ACYmP1NXyN/5ZT6zi4WCk0Sc8axKAstEc7v3ai0X3yV19UQ7w+53 NhXShCkBTFaG2F9H4epGsexQZNAG42nM58rpKKUp4Urel+ouHqxUIgZnFe4NdK284BrEe91SCeZ9Z 3gX6YXXVBchg07CJbA+sA4mV4BDbMU7RAJH7yu+uW+bpzkWvyW6bsT8HoxhWgdJWf/JH7wrT5P6ZZ kaJsbunsQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXWsp-0002VX-Ca; Tue, 27 Oct 2020 21:51:59 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kXWsT-0002PY-2t for linux-arm-kernel@lists.infradead.org; Tue, 27 Oct 2020 21:51:38 +0000 Received: from localhost.localdomain (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5CC1B20829; Tue, 27 Oct 2020 21:51:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603835496; bh=7xtHpE+jN4KpE9aM9q3M6jMkm03ttdE7SBSV+UdhCUQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l/U0lij0fRys470mF3hwkMMbzObDJHRKi2dF5fW3IA/jbYB9alNaVzhhx/g/7o6cg bqIbnBe1A7JAGpgFfiIj6b5z/Kv+dMaHVEN4zTs8fceQxp4LBtoXHGGSPMr5p3qD9D f2ECqbFgp1/9T4F9tzZUUfDvDhUzvbLGLBgZ5fTY= From: Will Deacon To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/6] arm64: Advertise CPUs capable of running 32-bit applcations in sysfs Date: Tue, 27 Oct 2020 21:51:17 +0000 Message-Id: <20201027215118.27003-6-will@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201027215118.27003-1-will@kernel.org> References: <20201027215118.27003-1-will@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201027_175137_384376_059431C1 X-CRM114-Status: GOOD ( 16.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Marc Zyngier , kernel-team@android.com, Peter Zijlstra , Catalin Marinas , Qais Yousef , Suren Baghdasaryan , Greg Kroah-Hartman , Will Deacon , Morten Rasmussen Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since 32-bit applications will be killed if they are caught trying to execute on a 64-bit-only CPU in a mismatched system, advertise the set of 32-bit capable CPUs to userspace in sysfs. Signed-off-by: Will Deacon --- .../ABI/testing/sysfs-devices-system-cpu | 8 ++++++++ arch/arm64/kernel/cpufeature.c | 19 +++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index b555df825447..19893fb8e870 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -472,6 +472,14 @@ Description: AArch64 CPU registers 'identification' directory exposes the CPU ID registers for identifying model and revision of the CPU. +What: /sys/devices/system/cpu/aarch32_el0 +Date: October 2020 +Contact: Linux ARM Kernel Mailing list +Description: Identifies the subset of CPUs in the system that can execute + AArch32 (32-bit ARM) applications. If absent, then all or none + of the CPUs can execute AArch32 applications and execve() will + behave accordingly. + What: /sys/devices/system/cpu/cpu#/cpu_capacity Date: December 2016 Contact: Linux kernel mailing list diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 2e2219cbd54c..9f29d4d1ef7e 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -67,6 +67,7 @@ #include #include #include +#include #include #include #include @@ -1236,6 +1237,24 @@ bool system_has_mismatched_32bit_el0(void) return fld == ID_AA64PFR0_EL0_64BIT_ONLY; } +static ssize_t aarch32_el0_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + const struct cpumask *mask = system_32bit_el0_cpumask(); + return sprintf(buf, "%*pbl\n", cpumask_pr_args(mask)); +} +static const struct kobj_attribute aarch32_el0_attr = __ATTR_RO(aarch32_el0); + +static int __init aarch32_el0_sysfs_init(void) +{ + if (!__allow_mismatched_32bit_el0) + return 0; + + return sysfs_create_file(&cpu_subsys.dev_root->kobj, + &aarch32_el0_attr.attr); +} +device_initcall(aarch32_el0_sysfs_init); + static bool has_32bit_el0(const struct arm64_cpu_capabilities *entry, int scope) { return has_cpuid_feature(entry, scope) || __allow_mismatched_32bit_el0;