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[4/8] arm64: dts: ti: k3-am654-base-board: Reserve memory for IPC between R5F cores

Message ID 20201029033802.15366-5-s-anna@ti.com (mailing list archive)
State New, archived
Headers show
Series Add R5F nodes on TI K3 AM65x and J721E SoCs | expand

Commit Message

Suman Anna Oct. 29, 2020, 3:37 a.m. UTC 
Add a reserved memory node to reserve a portion of the DDR memory to be
used for performing inter-processor communication between all the MCU R5F
remote processors running RTOS on all the TI AM654 boards. This memory
shall be exercised only if the MCU R5FSS cluster is configured for Split
mode.  A single 1 MB of memory at 0xa2000000 is reserved for this purpose,
and this accounts for all the vrings and vring buffers between pair of
these R5F remote processors.

Signed-off-by: Suman Anna <s-anna@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 23a1f266d1d4..17f3a85360e6 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -59,6 +59,12 @@  mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
 			reg = <0 0xa1100000 0 0xf00000>;
 			no-map;
 		};
+
+		rtos_ipc_memory_region: ipc-memories@a2000000 {
+			reg = <0x00 0xa2000000 0x00 0x00100000>;
+			alignment = <0x1000>;
+			no-map;
+		};
 	};
 
 	gpio-keys {