diff mbox series

[v2,3/3] arm64: smp: Disable priority masking when NMI is enable on PSR.I section

Message ID 20201104080539.3205889-4-ito-yuichi@fujitsu.com (mailing list archive)
State New, archived
Headers show
Series Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI | expand

Commit Message

Yuichi Ito Nov. 4, 2020, 8:05 a.m. UTC 
It should be prohibitted to use priority masking in NMI context.

Using local_irq_disable() under the above conditions causes a WARNING.
Then, there will be also a mismatch between the PSR.I values and PMR GIC_PRIO_PSR_I_SET.

Signed-off-by: Yuichi Ito <ito-yuichi@fujitsu.com>
---
 arch/arm64/kernel/smp.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index fd59bc7..3c49f06 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -872,7 +872,9 @@  static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
 
 	atomic_dec(&waiting_for_crash_ipi);
 
-	local_irq_disable();
+	if(!in_nmi())
+		local_irq_disable();
+
 	sdei_mask_local_cpu();
 
 	if (IS_ENABLED(CONFIG_HOTPLUG_CPU))