From patchwork Thu Nov 5 17:44:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 11884795 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87DC8C55178 for ; Thu, 5 Nov 2020 17:46:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 12240206F4 for ; Thu, 5 Nov 2020 17:46:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Wv0gcY4p" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 12240206F4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Subject:MIME-Version:References:In-Reply-To: Message-Id:Date:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fNOWDOdZVGi8Q+oL1rYLdAYUOCoDwhN6HotFFzozUFU=; b=Wv0gcY4pH6D/7s3YQBVo2aDtH 0a80e8wRWQgT9afw2hHAi+uGRJPPKsIlPhHg0wM4t8i6DzROPrAJyOf33hqqgEMgVphUJW7bzqNfL QfiMOONi8HWEmdJp/TyBh7dwooi/RQg2VRVSqv7uYEs5XYB9aShf0IoE0wHOvtFTxbCgjI/3rhFCl us8IwYpaaQUSnGiaSaq3cd6vDBD7D+MPRvjwEHQmkPMf4m6baIBwE8G4szjm21d4eR5gEnoTvV1j0 DEEFhRwR3dJuxpqxEQKiYoerQE4s6I6nz7N4iFqw2YgTsxEuRiW3PtqKk4DRI6/Wpo3oniRhL2Zph DKE7nLxDw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kajKh-0000U3-7R; Thu, 05 Nov 2020 17:45:59 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kajJh-0008OR-FA for linux-arm-kernel@lists.infradead.org; Thu, 05 Nov 2020 17:44:59 +0000 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1kajJa-0005qB-Qi; Thu, 05 Nov 2020 18:44:51 +0100 From: Lucas Stach To: Shawn Guo , Rob Herring Date: Thu, 5 Nov 2020 18:44:33 +0100 Message-Id: <20201105174434.1817539-13-l.stach@pengutronix.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105174434.1817539-1-l.stach@pengutronix.de> References: <20201105174434.1817539-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de Subject: [PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and power domains X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201105_124457_851837_F038747E X-CRM114-Status: GOOD ( 13.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , devicetree@vger.kernel.org, Fabio Estevam , Frieder Schrempf , patchwork-lst@pengutronix.de, NXP Linux Team , kernel@pengutronix.de, Adam Ford , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds the DT nodes to describe the power domains available on the i.MX8MM. Things are a bit more complex compared to other GPCv2 power domain setups, as there is now a hierarchy of domains where complete subsystems (HSIO, GPU, DISPLAY) can be gated as a whole, but also fine granular gating within those subsystems is possible. Note that this is still incomplete, as both VPU and DISP domains are missing their reset clocks. Those aren't directly sourced from the CCM, but have another level of clock gating in the BLKCTL of those domains, which needs a separate driver. Signed-off-by: Lucas Stach --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 58 +++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index b83f400def8b..c21901a8aea9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -4,6 +4,8 @@ */ #include +#include +#include #include #include #include @@ -547,6 +549,62 @@ interrupts = ; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mm-gpc"; + reg = <0x303a0000 0x10000>; + interrupts = ; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_hsiomix: power-domain@0 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MM_CLK_USB_BUS>; + }; + + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = ; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg1: power-domain@2 { + #power-domain-cells = <0>; + reg = ; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg2: power-domain@3 { + #power-domain-cells = <0>; + reg = ; + power-domains = <&pgc_hsiomix>; + }; + + pgc_gpumix: power-domain@4 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU_AHB>; + }; + + pgc_gpu: power-domain@5 { + #power-domain-cells = <0>; + reg = ; + clocks = <&clk IMX8MM_CLK_GPU_AHB>, + <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU2D_ROOT>, + <&clk IMX8MM_CLK_GPU3D_ROOT>; + resets = <&src IMX8MQ_RESET_GPU_RESET>; + power-domains = <&pgc_gpumix>; + }; + }; + }; }; aips2: bus@30400000 {