| Message ID | 20201107115809.1866131-2-aford173@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On Sat, Nov 7, 2020 at 5:58 AM Adam Ford <aford173@gmail.com> wrote: > > The driver exists for the Enhanced Asynchronous Sample Rate Converter > (EASRC) Controller, but there isn't a device tree entry for it. > > On the vendor kernel, they put this on a spba-bus for SDMA support. > > Add the node for the spba-bus with the easrc node inside. > > Signed-off-by: Adam Ford <aford173@gmail.com> Shawn, I split the dt-binding into a separate patch since I was struggling with checking the yaml syntax. Rob helped me find the proper branch to use. I hope it goes through this time. Do you have any comments on the rest of the series? I would like to fix them if you have any concerns so I can resend if/when the dt-binding is accepted. thanks, adam > --- > V4: No change > V3: Change spba-bus@30000000 to spba: bus@30000000 > V2: Make the DT node more in-line with the dt binding and remove > vendor customizations that are not applicable. > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 28 +++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > index a06d2a6268e6..61560c083300 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > @@ -253,6 +253,34 @@ aips1: bus@30000000 { > #size-cells = <1>; > ranges; > > + spba: bus@30000000 { > + compatible = "fsl,spba-bus", "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x30000000 0x100000>; > + ranges; > + > + easrc: easrc@300c0000 { > + compatible = "fsl,imx8mn-easrc"; > + reg = <0x300c0000 0x10000>; > + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>; > + clock-names = "mem"; > + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>, > + <&sdma2 18 23 0> , <&sdma2 19 23 0>, > + <&sdma2 20 23 0> , <&sdma2 21 23 0>, > + <&sdma2 22 23 0> , <&sdma2 23 23 0>; > + dma-names = "ctx0_rx", "ctx0_tx", > + "ctx1_rx", "ctx1_tx", > + "ctx2_rx", "ctx2_tx", > + "ctx3_rx", "ctx3_tx"; > + firmware-name = "imx/easrc/easrc-imx8mn.bin"; > + fsl,asrc-rate = <8000>; > + fsl,asrc-format = <2>; > + status = "disabled"; > + }; > + }; > + > gpio1: gpio@30200000 { > compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio"; > reg = <0x30200000 0x10000>; > -- > 2.25.1 >
On Wed, Nov 18, 2020 at 5:13 PM Adam Ford <aford173@gmail.com> wrote: > > On Sat, Nov 7, 2020 at 5:58 AM Adam Ford <aford173@gmail.com> wrote: > > > > The driver exists for the Enhanced Asynchronous Sample Rate Converter > > (EASRC) Controller, but there isn't a device tree entry for it. > > > > On the vendor kernel, they put this on a spba-bus for SDMA support. > > > > Add the node for the spba-bus with the easrc node inside. > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > Shawn, > > I split the dt-binding into a separate patch since I was struggling > with checking the yaml syntax. Rob helped me find the proper branch > to use. I hope it goes through this time. > > Do you have any comments on the rest of the series? I would like to > fix them if you have any concerns so I can resend if/when the > dt-binding is accepted. Shawn, The dt-binding was accepted per [1]. How do you want me to proceed for the rest of the series? I can resend the other parts without the dt-binding if you like. thanks, adam [1] - https://lkml.org/lkml/2020/11/30/1211 > > thanks, > > adam > > > --- > > V4: No change > > V3: Change spba-bus@30000000 to spba: bus@30000000 > > V2: Make the DT node more in-line with the dt binding and remove > > vendor customizations that are not applicable. > > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 28 +++++++++++++++++++++++ > > 1 file changed, 28 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > > index a06d2a6268e6..61560c083300 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi > > @@ -253,6 +253,34 @@ aips1: bus@30000000 { > > #size-cells = <1>; > > ranges; > > > > + spba: bus@30000000 { > > + compatible = "fsl,spba-bus", "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + reg = <0x30000000 0x100000>; > > + ranges; > > + > > + easrc: easrc@300c0000 { > > + compatible = "fsl,imx8mn-easrc"; > > + reg = <0x300c0000 0x10000>; > > + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>; > > + clock-names = "mem"; > > + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>, > > + <&sdma2 18 23 0> , <&sdma2 19 23 0>, > > + <&sdma2 20 23 0> , <&sdma2 21 23 0>, > > + <&sdma2 22 23 0> , <&sdma2 23 23 0>; > > + dma-names = "ctx0_rx", "ctx0_tx", > > + "ctx1_rx", "ctx1_tx", > > + "ctx2_rx", "ctx2_tx", > > + "ctx3_rx", "ctx3_tx"; > > + firmware-name = "imx/easrc/easrc-imx8mn.bin"; > > + fsl,asrc-rate = <8000>; > > + fsl,asrc-format = <2>; > > + status = "disabled"; > > + }; > > + }; > > + > > gpio1: gpio@30200000 { > > compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio"; > > reg = <0x30200000 0x10000>; > > -- > > 2.25.1 > >
On Mon, Nov 30, 2020 at 06:08:25PM -0600, Adam Ford wrote: > On Wed, Nov 18, 2020 at 5:13 PM Adam Ford <aford173@gmail.com> wrote: > > > > On Sat, Nov 7, 2020 at 5:58 AM Adam Ford <aford173@gmail.com> wrote: > > > > > > The driver exists for the Enhanced Asynchronous Sample Rate Converter > > > (EASRC) Controller, but there isn't a device tree entry for it. > > > > > > On the vendor kernel, they put this on a spba-bus for SDMA support. > > > > > > Add the node for the spba-bus with the easrc node inside. > > > > > > Signed-off-by: Adam Ford <aford173@gmail.com> > > > > Shawn, > > > > I split the dt-binding into a separate patch since I was struggling > > with checking the yaml syntax. Rob helped me find the proper branch > > to use. I hope it goes through this time. > > > > Do you have any comments on the rest of the series? I would like to > > fix them if you have any concerns so I can resend if/when the > > dt-binding is accepted. > > Shawn, > > The dt-binding was accepted per [1]. How do you want me to proceed > for the rest of the series? I can resend the other parts without the > dt-binding if you like. Applied 4 DTS patches, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index a06d2a6268e6..61560c083300 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -253,6 +253,34 @@ aips1: bus@30000000 { #size-cells = <1>; ranges; + spba: bus@30000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x30000000 0x100000>; + ranges; + + easrc: easrc@300c0000 { + compatible = "fsl,imx8mn-easrc"; + reg = <0x300c0000 0x10000>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>; + clock-names = "mem"; + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>, + <&sdma2 18 23 0> , <&sdma2 19 23 0>, + <&sdma2 20 23 0> , <&sdma2 21 23 0>, + <&sdma2 22 23 0> , <&sdma2 23 23 0>; + dma-names = "ctx0_rx", "ctx0_tx", + "ctx1_rx", "ctx1_tx", + "ctx2_rx", "ctx2_tx", + "ctx3_rx", "ctx3_tx"; + firmware-name = "imx/easrc/easrc-imx8mn.bin"; + fsl,asrc-rate = <8000>; + fsl,asrc-format = <2>; + status = "disabled"; + }; + }; + gpio1: gpio@30200000 { compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio"; reg = <0x30200000 0x10000>;
The driver exists for the Enhanced Asynchronous Sample Rate Converter (EASRC) Controller, but there isn't a device tree entry for it. On the vendor kernel, they put this on a spba-bus for SDMA support. Add the node for the spba-bus with the easrc node inside. Signed-off-by: Adam Ford <aford173@gmail.com> --- V4: No change V3: Change spba-bus@30000000 to spba: bus@30000000 V2: Make the DT node more in-line with the dt binding and remove vendor customizations that are not applicable. arch/arm64/boot/dts/freescale/imx8mn.dtsi | 28 +++++++++++++++++++++++ 1 file changed, 28 insertions(+)