From patchwork Mon Nov 16 20:43:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Brazdil X-Patchwork-Id: 11910805 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54601C2D0A3 for ; Mon, 16 Nov 2020 20:46:52 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 072BA2223D for ; Mon, 16 Nov 2020 20:46:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="g0SnL0mi"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=google.com header.i=@google.com header.b="fuyl7aAN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 072BA2223D Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=google.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=B9EDRxbDCx0xZe2mIqyjhOfKR8iuHskLoidN3f3fgJ4=; b=g0SnL0mifow/+OZuNKfPTULWB ZmNgsHSYCxh+A+qi29sPfdzz1cPcEeCcoDW28Et443cnofXpT4sXsfpc1QGDEc2mwlNl6sIgTDSml UJliDWNfbRZSwBUr9NBR7JdCyLw+LyW09HhgnSMrOANVKSiXbbu7QEzlWNTL1KBn7wwdCBd9NVEun 8d0q1ycHnHmRogbJH4wocKxvgXDE/s71REm3vuGeTXiF6eOGal9d2/jKJtYX6dYouWjDZLpC9dHTL 0T+l3XVCdX/3Jg4P3NdC9YVfywB7WuBfgkJ5UFH99RBMiej2AWccusXakknL5ejhAq+I9BH4Efq4k 3NGfWqYOg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kelO8-0000Mn-Rl; Mon, 16 Nov 2020 20:46:12 +0000 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kelLq-0007kK-37 for linux-arm-kernel@lists.infradead.org; Mon, 16 Nov 2020 20:43:52 +0000 Received: by mail-wm1-x341.google.com with SMTP id a3so564691wmb.5 for ; Mon, 16 Nov 2020 12:43:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qG/HoneOc994OJu++CpnomVnwB4P/ZTLebHJA4Q7lT4=; b=fuyl7aANEA8fwOLCn2RRwgCPg5sH4c3V57+KawyAxxoLb7efdJQZXGdT9w5DVinpSN p2cAZJJWwFiJGbY03YsNvgLfePDdDVDyDPwOMDf/VM7RYux4B6QAjpaMrNMdIhM2JrsN F8/TRQQH4URgM1anQ1ZAltLVCT4z9ckQp5p08BYXpuYeiA5tS7vX6pKlf9hEYaW2vPc8 LWhKPK+b9hxepoECbGLi31tWLqhNOzvRoPIjHvF/XPajEqHh29e1qKoQCVrXM+XHJ+ZV ayVTPHi56g7rqfkgAjMCABWTBv39onhqdO/kne03yfewB09hmJUpxDdqQNE33LiVwuUS t7CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qG/HoneOc994OJu++CpnomVnwB4P/ZTLebHJA4Q7lT4=; b=IHlmI2P8lj97EIckCjQKjwwp7wYPAx0fWjl9h8Yj8deAcjbtRUGiRn5qMZSWAtSh0s TxE5VJw4ffmWuA0k13AQwaN1MFkhI3UEUimS17HLOOLFUyFNOtajtUHECf4Mlb50ojFJ fVO26kKGPHfnNOCYkA2WMkvzT/LDDY/WlKUFJGv8Sx/bntrohEHjKsCd/e4AWCAE6ngs dIc4Jc1x3ogDPtclHGJRTEskyCO9PAYlO5mvEZWFBUQyEWHaE56UEYFfOqmkMiWvdOwG vlvoM3K0rqTrR3TcahpX3BbK7iG74ITi21gXpmaHt5voKu1BfHkVfwIXyPPW3yYClPaX aDdA== X-Gm-Message-State: AOAM530yepPwMWS9EKGMWWvhgEMJwGGTygyOO8Nj6JxfGXK2Iaopy6Dy IHmejlbzsAV5Oju77apctCqcUp3rQ5eYL5SlLf0= X-Google-Smtp-Source: ABdhPJxfClLB31DdeOwu1p+YEOfV5ZETCzlEf+2nxs/8En6SPZQsIjrNlyxxoKIEEk3UhvuOE17GgQ== X-Received: by 2002:a1c:2586:: with SMTP id l128mr656447wml.149.1605559428664; Mon, 16 Nov 2020 12:43:48 -0800 (PST) Received: from localhost ([2a01:4b00:8523:2d03:bc40:bd71:373a:1b33]) by smtp.gmail.com with ESMTPSA id f17sm562523wmh.10.2020.11.16.12.43.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Nov 2020 12:43:47 -0800 (PST) From: David Brazdil To: kvmarm@lists.cs.columbia.edu Subject: [PATCH v2 12/24] kvm: arm64: Bootstrap PSCI SMC handler in nVHE EL2 Date: Mon, 16 Nov 2020 20:43:06 +0000 Message-Id: <20201116204318.63987-13-dbrazdil@google.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201116204318.63987-1-dbrazdil@google.com> References: <20201116204318.63987-1-dbrazdil@google.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201116_154350_292614_A96C8DD7 X-CRM114-Status: GOOD ( 26.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , kernel-team@android.com, Lorenzo Pieralisi , Andrew Walbran , Suzuki K Poulose , Marc Zyngier , Quentin Perret , linux-kernel@vger.kernel.org, James Morse , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Tejun Heo , Dennis Zhou , Christoph Lameter , David Brazdil , Will Deacon , Julien Thierry , Andrew Scull Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a handler of PSCI SMCs in nVHE hyp code. The handler is initialized with the version used by the host's PSCI driver and the function IDs it was configured with. If the SMC function ID matches one of the configured PSCI calls (for v0.1) or falls into the PSCI function ID range (for v0.2+), the SMC is handled by the PSCI handler. For now, all SMCs return PSCI_RET_NOT_SUPPORTED. Signed-off-by: David Brazdil --- arch/arm64/include/asm/kvm_hyp.h | 4 ++ arch/arm64/kvm/arm.c | 14 ++++ arch/arm64/kvm/hyp/nvhe/Makefile | 2 +- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 6 +- arch/arm64/kvm/hyp/nvhe/psci-relay.c | 104 +++++++++++++++++++++++++++ 5 files changed, 128 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/kvm/hyp/nvhe/psci-relay.c diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h index a3289071f3d8..95a2bbbcc7e1 100644 --- a/arch/arm64/include/asm/kvm_hyp.h +++ b/arch/arm64/include/asm/kvm_hyp.h @@ -96,6 +96,10 @@ void deactivate_traps_vhe_put(void); u64 __guest_enter(struct kvm_vcpu *vcpu); +#ifdef __KVM_NVHE_HYPERVISOR__ +bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt); +#endif + void __noreturn hyp_panic(void); #ifdef __KVM_NVHE_HYPERVISOR__ void __noreturn __hyp_do_panic(bool restore_host, u64 spsr, u64 elr, u64 par); diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index cdd7981ea560..7d2270eeecfb 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #define CREATE_TRACE_POINTS @@ -1514,6 +1515,18 @@ static void init_cpu_logical_map(void) CHOOSE_NVHE_SYM(__cpu_logical_map)[cpu] = cpu_logical_map(cpu); } +static void init_psci_relay(void) +{ + extern u32 kvm_nvhe_sym(kvm_host_psci_version); + extern u32 kvm_nvhe_sym(kvm_host_psci_function_id)[PSCI_FN_MAX]; + int i; + + CHOOSE_NVHE_SYM(kvm_host_psci_version) = psci_ops.get_version + ? psci_ops.get_version() : PSCI_VERSION(0, 0); + for (i = 0; i < PSCI_FN_MAX; ++i) + CHOOSE_NVHE_SYM(kvm_host_psci_function_id)[i] = psci_get_function_id(i); +} + static int init_common_resources(void) { return kvm_set_ipa_limit(); @@ -1693,6 +1706,7 @@ static int init_hyp_mode(void) } init_cpu_logical_map(); + init_psci_relay(); return 0; diff --git a/arch/arm64/kvm/hyp/nvhe/Makefile b/arch/arm64/kvm/hyp/nvhe/Makefile index 2d842e009a40..bf62c8e42ab2 100644 --- a/arch/arm64/kvm/hyp/nvhe/Makefile +++ b/arch/arm64/kvm/hyp/nvhe/Makefile @@ -7,7 +7,7 @@ asflags-y := -D__KVM_NVHE_HYPERVISOR__ ccflags-y := -D__KVM_NVHE_HYPERVISOR__ obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o hyp-init.o host.o \ - hyp-main.o hyp-smp.o + hyp-main.o hyp-smp.o psci-relay.o obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \ ../fpsimd.o ../hyp-entry.o diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c index 71a17af05953..df4acb40dd39 100644 --- a/arch/arm64/kvm/hyp/nvhe/hyp-main.c +++ b/arch/arm64/kvm/hyp/nvhe/hyp-main.c @@ -120,7 +120,11 @@ static void skip_host_instruction(void) static void handle_host_smc(struct kvm_cpu_context *host_ctxt) { - default_host_smc_handler(host_ctxt); + bool handled; + + handled = kvm_host_psci_handler(host_ctxt); + if (!handled) + default_host_smc_handler(host_ctxt); /* * Unlike HVC, the return address of an SMC is the instruction's PC. diff --git a/arch/arm64/kvm/hyp/nvhe/psci-relay.c b/arch/arm64/kvm/hyp/nvhe/psci-relay.c new file mode 100644 index 000000000000..d75d3f896bfd --- /dev/null +++ b/arch/arm64/kvm/hyp/nvhe/psci-relay.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2020 - Google LLC + * Author: David Brazdil + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Config options set by the host. */ +u32 __ro_after_init kvm_host_psci_version = PSCI_VERSION(0, 0); +u32 __ro_after_init kvm_host_psci_function_id[PSCI_FN_MAX]; + +static u64 get_psci_func_id(struct kvm_cpu_context *host_ctxt) +{ + return host_ctxt->regs.regs[0]; +} + +static bool is_psci_0_1_call(u64 func_id) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(kvm_host_psci_function_id); ++i) { + if (func_id == kvm_host_psci_function_id[i]) + return true; + } + return false; +} + +static bool is_psci_0_2_call(u64 func_id) +{ + /* SMCCC reserves IDs 0x00-1F with the given 32/64-bit base for PSCI. */ + return (PSCI_0_2_FN(0) <= func_id && func_id <= PSCI_0_2_FN(31)) || + (PSCI_0_2_FN64(0) <= func_id && func_id <= PSCI_0_2_FN64(31)); +} + +static bool is_psci_call(u64 func_id) +{ + switch (kvm_host_psci_version) { + case PSCI_VERSION(0, 0): + return false; + case PSCI_VERSION(0, 1): + return is_psci_0_1_call(func_id); + default: + return is_psci_0_2_call(func_id); + } +} + +static unsigned long psci_0_1_handler(u64 func_id, struct kvm_cpu_context *host_ctxt) +{ + return PSCI_RET_NOT_SUPPORTED; +} + +static unsigned long psci_0_2_handler(u64 func_id, struct kvm_cpu_context *host_ctxt) +{ + switch (func_id) { + default: + return PSCI_RET_NOT_SUPPORTED; + } +} + +static unsigned long psci_1_0_handler(u64 func_id, struct kvm_cpu_context *host_ctxt) +{ + switch (func_id) { + default: + return psci_0_2_handler(func_id, host_ctxt); + } +} + +bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt) +{ + u64 func_id = get_psci_func_id(host_ctxt); + unsigned long ret; + + if (!is_psci_call(func_id)) + return false; + + switch (kvm_host_psci_version) { + case PSCI_VERSION(0, 0): + ret = PSCI_RET_NOT_SUPPORTED; + break; + case PSCI_VERSION(0, 1): + ret = psci_0_1_handler(func_id, host_ctxt); + break; + case PSCI_VERSION(0, 2): + ret = psci_0_2_handler(func_id, host_ctxt); + break; + default: + ret = psci_1_0_handler(func_id, host_ctxt); + break; + } + + host_ctxt->regs.regs[0] = ret; + host_ctxt->regs.regs[1] = 0; + host_ctxt->regs.regs[2] = 0; + host_ctxt->regs.regs[3] = 0; + return true; +}