From patchwork Thu Nov 19 16:45:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 11918335 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BE0DC56201 for ; Thu, 19 Nov 2020 16:53:32 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D104A21D46 for ; Thu, 19 Nov 2020 16:53:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="cozIvk4S" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D104A21D46 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=UD9dzfTs2iciQOAVRcDUAHsYCnllg9/pT8vMpdPuTQQ=; b=cozIvk4SxXt06SZAp9vso4YMg GPyd+zykNOuJh/1MDGCfuC3CLfLlUyFoGmqrZ7psuHVDWrXx62+ChkWuFuxzaGOu7xxTbgqCGumQH gIhJS6f5LrvjjwHbZ52bWuyVX9vKY7+XVOBmzoB78JwuCNUXH+aeH1D6+stgWmohJvoXrF59EccqS n1fLO290BnGIdjh2HOMtli8Ens6Umxftd+fA/f+FbMSwO+Q/WoprbwORgrQQJnIDcsrsm2XDI1ZJY F7vPXh7OxWlz7YKl7zJ2+NG5nHRmjO+qYjYDlhX6UDFURA9H8SF8xsWxSYsw04+AsXTjqamHsiWno 8w9LSlQyQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kfn9G-0002pQ-Ff; Thu, 19 Nov 2020 16:51:06 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kfn4f-00013C-UV for linux-arm-kernel@lists.infradead.org; Thu, 19 Nov 2020 16:46:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D59FD1684; Thu, 19 Nov 2020 08:46:17 -0800 (PST) Received: from ewhatever.cambridge.arm.com (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B817A3F719; Thu, 19 Nov 2020 08:46:16 -0800 (PST) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 12/25] coresight: etm4x: Check for Software Lock Date: Thu, 19 Nov 2020 16:45:34 +0000 Message-Id: <20201119164547.2982871-13-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20201119164547.2982871-1-suzuki.poulose@arm.com> References: <20201119164547.2982871-1-suzuki.poulose@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201119_114622_456596_BF0B0F93 X-CRM114-Status: GOOD ( 14.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mathieu.poirier@linaro.org, anshuman.khandual@arm.com, coresight@lists.linaro.org, Suzuki K Poulose , linux-kernel@vger.kernel.org, jonathan.zhouwen@huawei.com, mike.leach@linaro.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Software lock is not implemented for system instructions based accesses. So, skip the lock register access in such cases. Cc: Mike Leach Reviewed-by: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- .../coresight/coresight-etm4x-core.c | 40 ++++++++++++------- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 6f776f075602..85a165d1245e 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -130,6 +130,21 @@ static void etm4_os_lock(struct etmv4_drvdata *drvdata) isb(); } +static void etm4_cs_lock(struct etmv4_drvdata *drvdata, + struct csdev_access *csa) +{ + /* Software Lock is only accessible via memory mapped interface */ + if (csa->io_mem) + CS_LOCK(csa->base); +} + +static void etm4_cs_unlock(struct etmv4_drvdata *drvdata, + struct csdev_access *csa) +{ + if (csa->io_mem) + CS_UNLOCK(csa->base); +} + static bool etm4_arch_supported(u8 arch) { /* Mask out the minor version number */ @@ -169,8 +184,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) struct device *etm_dev = &csdev->dev; struct csdev_access *csa = &csdev->access; - CS_UNLOCK(drvdata->base); - + etm4_cs_unlock(drvdata, csa); etm4_os_unlock(drvdata); rc = coresight_claim_device_unlocked(csdev); @@ -271,7 +285,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) isb(); done: - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); dev_dbg(etm_dev, "cpu: %d enable smp call done: %d\n", drvdata->cpu, rc); @@ -528,7 +542,7 @@ static void etm4_disable_hw(void *info) struct csdev_access *csa = &csdev->access; int i; - CS_UNLOCK(drvdata->base); + etm4_cs_unlock(drvdata, csa); if (!drvdata->skip_power_up) { /* power can be removed from the trace unit now */ @@ -569,8 +583,7 @@ static void etm4_disable_hw(void *info) } coresight_disclaim_device_unlocked(csdev); - - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); dev_dbg(&drvdata->csdev->dev, "cpu: %d disable smp call done\n", drvdata->cpu); @@ -680,8 +693,7 @@ static void etm4_init_arch_data(void *info) /* Make sure all registers are accessible */ etm4_os_unlock_csa(drvdata, csa); - - CS_UNLOCK(drvdata->base); + etm4_cs_unlock(drvdata, csa); /* find all capabilities of the tracing unit */ etmidr0 = etm4x_relaxed_read32(csa, TRCIDR0); @@ -846,7 +858,7 @@ static void etm4_init_arch_data(void *info) drvdata->nrseqstate = BMVAL(etmidr5, 25, 27); /* NUMCNTR, bits[30:28] number of counters available for tracing */ drvdata->nr_cntr = BMVAL(etmidr5, 28, 30); - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); } /* Set ELx trace filter access in the TRCVICTLR register */ @@ -1227,8 +1239,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) dsb(sy); isb(); - CS_UNLOCK(drvdata->base); - + etm4_cs_unlock(drvdata, csa); /* Lock the OS lock to disable trace and external debugger access */ etm4_os_lock(drvdata); @@ -1341,7 +1352,7 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, (state->trcpdcr & ~TRCPDCR_PU), TRCPDCR); out: - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); return ret; } @@ -1352,8 +1363,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) struct csdev_access tmp_csa = CSDEV_ACCESS_IOMEM(drvdata->base); struct csdev_access *csa = &tmp_csa; - CS_UNLOCK(drvdata->base); - + etm4_cs_unlock(drvdata, csa); etm4x_relaxed_write32(csa, state->trcclaimset, TRCCLAIMSET); etm4x_relaxed_write32(csa, state->trcprgctlr, TRCPRGCTLR); @@ -1438,7 +1448,7 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) /* Unlock the OS lock to re-enable trace and external debug access */ etm4_os_unlock(drvdata); - CS_LOCK(drvdata->base); + etm4_cs_lock(drvdata, csa); } static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd,