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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=nxp.com; Received: from AM6PR04MB4966.eurprd04.prod.outlook.com (2603:10a6:20b:2::14) by AM7PR04MB6869.eurprd04.prod.outlook.com (2603:10a6:20b:dc::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3611.20; Thu, 26 Nov 2020 11:16:53 +0000 Received: from AM6PR04MB4966.eurprd04.prod.outlook.com ([fe80::3cfc:a92e:75ad:ce4a]) by AM6PR04MB4966.eurprd04.prod.outlook.com ([fe80::3cfc:a92e:75ad:ce4a%3]) with mapi id 15.20.3611.025; Thu, 26 Nov 2020 11:16:53 +0000 From: Dong Aisheng To: devicetree@vger.kernel.org Subject: [PATCH RESEND v4 12/18] arm64: dts: imx8qm: add lsio ss support Date: Thu, 26 Nov 2020 18:58:54 +0800 Message-Id: <20201126105900.26658-13-aisheng.dong@nxp.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20201126105900.26658-1-aisheng.dong@nxp.com> References: <20201126105900.26658-1-aisheng.dong@nxp.com> X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR03CA0160.apcprd03.prod.outlook.com (2603:1096:4:c9::15) To AM6PR04MB4966.eurprd04.prod.outlook.com (2603:10a6:20b:2::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from b29396-OptiPlex-7040.ap.freescale.net (119.31.174.66) by SG2PR03CA0160.apcprd03.prod.outlook.com (2603:1096:4:c9::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3632.7 via Frontend Transport; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: hoLNleAeHBonQifEJ5jqRvXGiw4sAD7gFOXqlZDBj1408PejgJdeFfr0K1XiPgOLLIZHTLTzjPdJBiX4XfwnhgGpv6T7Esvjrh3zND+GAT9Ze1ZbioGaIWq8D0XaCJ2OMJW0Da4OeAehpGmibEK9gjMKEI8H7J93el7dF4u3ipWWV+lq8K1KhxFi+5vS1QdIlyQcj5inHfELePyoMpOMVz3c77s/oDjketLVNvrs5s6VgGSvfkzSzvFvjTGaS+mi8sPTbXqe0RAdrtg2dRNxIDCo9a8ChbGHpMpVh0wgwu6/8gfMMRZPXTPZk/KmCLbA+2PUs1FWHN3MNFseSWEUB6PMLKG9ELeZpNFKb2Q6bll9wnyP4iOPAuKVRc/VAAVw478exjHqWY1AoYl5qeAByqrpffYtVqGuc2XHxGmm2IM6c2Eyq1cqP+u7AFpgAU6SUmKVaqRapVlp1oDwVU64O3ycsle8Qot7c6QwYMAwiSIyiFHHEQlS/qbkFO1e8uo6IRNS/87rxpTEcJzil0HIxivLpjJTDHGNicUAMeQcc0YJh+XGbz/4IQv9UyNnOopc754s6DV4tySEg1C5QJoBJgRFEFvg9GbrwPkM2IAERRdj8mHD08MuywKOHYNXL2Il+DjbMN7x5iHVgOFL4LAkFLM1cBXzq4asL3t6KcVGhR4tnjanA91YiKKEG1ahzh5amMHhdjQqsgH37yFE9ohRgUKxTV1zEEVfQ3T79QpooDz0u7SCEN2TIRlou3MLDJHlJLrAysFS/qpo+IwJIMYV0bZO9U3SrYWmXPQYim8VA9eLtNrdul1x81ZvM+C4Zl01qeYfr8QdR2vfkMqBmeYWB154okkuWSrL1JAQnjj/ec4AcKaFTLAN9sCrwG24x/70qdyDCq4SxaBiZxzGwIQ0bA== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3239f9d6-c9db-43dc-bf73-08d891fcc707 X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4966.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Nov 2020 11:16:53.3722 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Oz4T8kUXx3bpc8TEQYAjL11263+lSqoCD/4oHgbGF+H6iLKIblvNQDlYFFSXVncV5N4SjJlMNpy4nzBVNWJt6Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB6869 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201126_061655_835435_52CE67B3 X-CRM114-Status: GOOD ( 16.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dong Aisheng , Mark Rutland , linux-mmc@vger.kernel.org, Rob Herring , linux-imx@nxp.com, Sascha Hauer , Fabio Estevam , Shawn Guo , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The LSIO SS of MX8QM is exactly the same as MX8QXP. So we can fully reuse the exist LSIO SS dtsi. Add -ss-lsio.dtsi with compatible string updated according to imx8-ss-lsio.dtsi. Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: Shawn Guo Cc: Sascha Hauer Cc: Fabio Estevam Signed-off-by: Dong Aisheng --- ChangeLog: v2->v3: * no changes v1->v2: * change to the new two cell scu clk binding --- .../boot/dts/freescale/imx8qm-ss-lsio.dtsi | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi new file mode 100644 index 000000000000..30896610c654 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2020 NXP + * Dong Aisheng + */ + +&lsio_gpio0 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio1 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio2 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio3 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio4 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio5 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio6 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_gpio7 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; +}; + +&lsio_mu0 { + compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +}; + +&lsio_mu1 { + compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +}; + +&lsio_mu2 { + compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +}; + +&lsio_mu3 { + compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +}; + +&lsio_mu4 { + compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +}; + +&lsio_mu13 { + compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu"; +};