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[118.13.124.123]) by smtp.googlemail.com with ESMTPSA id a4sm41757578pjq.0.2020.11.30.05.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Nov 2020 05:11:08 -0800 (PST) From: Daniel Palmer To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 5/9] ARM: mstar: Add common dtsi for SSD201/SSD202D Date: Mon, 30 Nov 2020 22:10:43 +0900 Message-Id: <20201130131047.2648960-6-daniel@0x0f.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201130131047.2648960-1-daniel@0x0f.com> References: <20201130131047.2648960-1-daniel@0x0f.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201130_081111_665596_40053357 X-CRM114-Status: GOOD ( 15.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robh@kernel.org, daniel@0x0f.com, linux-kernel@vger.kernel.org, arnd@arndb.de, w@1wt.eu Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SSD201 and SSD202D are basically the same chip with a different DDR die packaged (64MB DDR2 or 128MB DDR3). This patch adds a shared dtsi for the common parts of these chips like gpio, pinctrl etc. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) create mode 100644 arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi diff --git a/arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi b/arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi new file mode 100644 index 000000000000..0811220f0a79 --- /dev/null +++ b/arch/arm/boot/dts/mstar-infinity2m-ssd20xd.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2020 thingy.jp. + * Author: Daniel Palmer + */ + +#include "mstar-infinity2m.dtsi"