diff mbox series

[v2,1/4] ARM: dts: rockchip: add QoS register compatibles for rk3066/rk3188

Message ID 20201206103711.7465-1-jbx6244@gmail.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/4] ARM: dts: rockchip: add QoS register compatibles for rk3066/rk3188 | expand

Commit Message

Johan Jonker Dec. 6, 2020, 10:37 a.m. UTC
With the conversion of syscon.yaml minItems for compatibles
was set to 2. Current Rockchip dtsi files only use "syscon" for
QoS registers. Add Rockchip QoS compatibles for rk3066/rk3188
to reduce notifications produced with:

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
Changed v2:
  add space
---
 arch/arm/boot/dts/rk3xxx.dtsi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Heiko Stuebner Jan. 9, 2021, 3:39 p.m. UTC | #1
On Sun, 6 Dec 2020 11:37:08 +0100, Johan Jonker wrote:
> With the conversion of syscon.yaml minItems for compatibles
> was set to 2. Current Rockchip dtsi files only use "syscon" for
> QoS registers. Add Rockchip QoS compatibles for rk3066/rk3188
> to reduce notifications produced with:
> 
> make ARCH=arm dtbs_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml

Applied, thanks!

[3/4] arm64: dts: rockchip: add QoS register compatibles for rk3399
      commit: bd3fd04910ab5e4d571c19f50c341de175597dfa
[4/4] arm64: dts: rockchip: add QoS register compatibles for px30
      commit: 6c3ae9f9a133d387ef4e1b4297c9df4e9a1c469d

Best regards,
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 859a74779..49bcdf46d 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -151,42 +151,42 @@ 
 	};
 
 	qos_gpu: qos@1012d000 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012d000 0x20>;
 	};
 
 	qos_vpu: qos@1012e000 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012e000 0x20>;
 	};
 
 	qos_lcdc0: qos@1012f000 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f000 0x20>;
 	};
 
 	qos_cif0: qos@1012f080 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f080 0x20>;
 	};
 
 	qos_ipp: qos@1012f100 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f100 0x20>;
 	};
 
 	qos_lcdc1: qos@1012f180 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f180 0x20>;
 	};
 
 	qos_cif1: qos@1012f200 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f200 0x20>;
 	};
 
 	qos_rga: qos@1012f280 {
-		compatible = "syscon";
+		compatible = "rockchip,rk3066-qos", "syscon";
 		reg = <0x1012f280 0x20>;
 	};