diff mbox series

[v2,1/2] arm64: dts: mediatek: mt8183: add pwm node

Message ID 20201209120322.137610-1-fparent@baylibre.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] arm64: dts: mediatek: mt8183: add pwm node | expand

Commit Message

Fabien Parent Dec. 9, 2020, 12:03 p.m. UTC
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
---

V2: rename pwm0 to pwm1 since disp-pwm has been merged in v5.11 as pwm0

 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Matthias Brugger Jan. 29, 2021, 4:12 p.m. UTC | #1
On 09/12/2020 13:03, Fabien Parent wrote:
> MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>

Applied to v5.11-next/dts64

Thanks

> ---
> 
> V2: rename pwm0 to pwm1 since disp-pwm has been merged in v5.11 as pwm0
> 
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..a0004bd9f9c2 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -667,6 +667,20 @@ pwm0: pwm@1100e000 {
>  			clock-names = "main", "mm";
>  		};
>  
> +		pwm1: pwm@11006000 {
> +			compatible = "mediatek,mt8183-pwm";
> +			reg = <0 0x11006000 0 0x1000>;
> +			#pwm-cells = <2>;
> +			clocks = <&infracfg CLK_INFRA_PWM>,
> +				 <&infracfg CLK_INFRA_PWM_HCLK>,
> +				 <&infracfg CLK_INFRA_PWM1>,
> +				 <&infracfg CLK_INFRA_PWM2>,
> +				 <&infracfg CLK_INFRA_PWM3>,
> +				 <&infracfg CLK_INFRA_PWM4>;
> +			clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
> +				      "pwm4";
> +		};
> +
>  		i2c3: i2c@1100f000 {
>  			compatible = "mediatek,mt8183-i2c";
>  			reg = <0 0x1100f000 0 0x1000>,
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5b782a4769e7..a0004bd9f9c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -667,6 +667,20 @@  pwm0: pwm@1100e000 {
 			clock-names = "main", "mm";
 		};
 
+		pwm1: pwm@11006000 {
+			compatible = "mediatek,mt8183-pwm";
+			reg = <0 0x11006000 0 0x1000>;
+			#pwm-cells = <2>;
+			clocks = <&infracfg CLK_INFRA_PWM>,
+				 <&infracfg CLK_INFRA_PWM_HCLK>,
+				 <&infracfg CLK_INFRA_PWM1>,
+				 <&infracfg CLK_INFRA_PWM2>,
+				 <&infracfg CLK_INFRA_PWM3>,
+				 <&infracfg CLK_INFRA_PWM4>;
+			clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
+				      "pwm4";
+		};
+
 		i2c3: i2c@1100f000 {
 			compatible = "mediatek,mt8183-i2c";
 			reg = <0 0x1100f000 0 0x1000>,