Message ID | 20201210160002.1407373-6-maz@kernel.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: arm64: ARMv8.3/8.4 Nested Virtualization support | expand |
On Thu, 10 Dec 2020 15:59:01 +0000 Marc Zyngier <maz@kernel.org> wrote: Hi, > Add the minimal set of EL2 system registers to the vcpu context. > Nothing uses them just yet. > > Signed-off-by: Marc Zyngier <maz@kernel.org> Checked against the ARM ARM that this list contains the _EL2 registers available in ARMv8.1, minus timer and GIC registers. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > arch/arm64/include/asm/kvm_host.h | 34 ++++++++++++++++++++++++++++++- > 1 file changed, 33 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 11beda85ee7e..d731cf7a56cb 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -206,12 +206,44 @@ enum vcpu_sysreg { > CNTP_CVAL_EL0, > CNTP_CTL_EL0, > > - /* 32bit specific registers. Keep them at the end of the range */ > + /* 32bit specific registers. */ > DACR32_EL2, /* Domain Access Control Register */ > IFSR32_EL2, /* Instruction Fault Status Register */ > FPEXC32_EL2, /* Floating-Point Exception Control Register */ > DBGVCR32_EL2, /* Debug Vector Catch Register */ > > + /* EL2 registers */ > + VPIDR_EL2, /* Virtualization Processor ID Register */ > + VMPIDR_EL2, /* Virtualization Multiprocessor ID Register */ > + SCTLR_EL2, /* System Control Register (EL2) */ > + ACTLR_EL2, /* Auxiliary Control Register (EL2) */ > + HCR_EL2, /* Hypervisor Configuration Register */ > + MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */ > + CPTR_EL2, /* Architectural Feature Trap Register (EL2) */ > + HSTR_EL2, /* Hypervisor System Trap Register */ > + HACR_EL2, /* Hypervisor Auxiliary Control Register */ > + TTBR0_EL2, /* Translation Table Base Register 0 (EL2) */ > + TTBR1_EL2, /* Translation Table Base Register 1 (EL2) */ > + TCR_EL2, /* Translation Control Register (EL2) */ > + VTTBR_EL2, /* Virtualization Translation Table Base Register */ > + VTCR_EL2, /* Virtualization Translation Control Register */ > + SPSR_EL2, /* EL2 saved program status register */ > + ELR_EL2, /* EL2 exception link register */ > + AFSR0_EL2, /* Auxiliary Fault Status Register 0 (EL2) */ > + AFSR1_EL2, /* Auxiliary Fault Status Register 1 (EL2) */ > + ESR_EL2, /* Exception Syndrome Register (EL2) */ > + FAR_EL2, /* Hypervisor IPA Fault Address Register */ > + HPFAR_EL2, /* Hypervisor IPA Fault Address Register */ > + MAIR_EL2, /* Memory Attribute Indirection Register (EL2) */ > + AMAIR_EL2, /* Auxiliary Memory Attribute Indirection Register (EL2) */ > + VBAR_EL2, /* Vector Base Address Register (EL2) */ > + RVBAR_EL2, /* Reset Vector Base Address Register */ > + RMR_EL2, /* Reset Management Register */ > + CONTEXTIDR_EL2, /* Context ID Register (EL2) */ > + TPIDR_EL2, /* EL2 Software Thread ID Register */ > + CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */ > + SP_EL2, /* EL2 Stack Pointer */ > + > NR_SYS_REGS /* Nothing after this line! */ > }; >
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 11beda85ee7e..d731cf7a56cb 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -206,12 +206,44 @@ enum vcpu_sysreg { CNTP_CVAL_EL0, CNTP_CTL_EL0, - /* 32bit specific registers. Keep them at the end of the range */ + /* 32bit specific registers. */ DACR32_EL2, /* Domain Access Control Register */ IFSR32_EL2, /* Instruction Fault Status Register */ FPEXC32_EL2, /* Floating-Point Exception Control Register */ DBGVCR32_EL2, /* Debug Vector Catch Register */ + /* EL2 registers */ + VPIDR_EL2, /* Virtualization Processor ID Register */ + VMPIDR_EL2, /* Virtualization Multiprocessor ID Register */ + SCTLR_EL2, /* System Control Register (EL2) */ + ACTLR_EL2, /* Auxiliary Control Register (EL2) */ + HCR_EL2, /* Hypervisor Configuration Register */ + MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */ + CPTR_EL2, /* Architectural Feature Trap Register (EL2) */ + HSTR_EL2, /* Hypervisor System Trap Register */ + HACR_EL2, /* Hypervisor Auxiliary Control Register */ + TTBR0_EL2, /* Translation Table Base Register 0 (EL2) */ + TTBR1_EL2, /* Translation Table Base Register 1 (EL2) */ + TCR_EL2, /* Translation Control Register (EL2) */ + VTTBR_EL2, /* Virtualization Translation Table Base Register */ + VTCR_EL2, /* Virtualization Translation Control Register */ + SPSR_EL2, /* EL2 saved program status register */ + ELR_EL2, /* EL2 exception link register */ + AFSR0_EL2, /* Auxiliary Fault Status Register 0 (EL2) */ + AFSR1_EL2, /* Auxiliary Fault Status Register 1 (EL2) */ + ESR_EL2, /* Exception Syndrome Register (EL2) */ + FAR_EL2, /* Hypervisor IPA Fault Address Register */ + HPFAR_EL2, /* Hypervisor IPA Fault Address Register */ + MAIR_EL2, /* Memory Attribute Indirection Register (EL2) */ + AMAIR_EL2, /* Auxiliary Memory Attribute Indirection Register (EL2) */ + VBAR_EL2, /* Vector Base Address Register (EL2) */ + RVBAR_EL2, /* Reset Vector Base Address Register */ + RMR_EL2, /* Reset Management Register */ + CONTEXTIDR_EL2, /* Context ID Register (EL2) */ + TPIDR_EL2, /* EL2 Software Thread ID Register */ + CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */ + SP_EL2, /* EL2 Stack Pointer */ + NR_SYS_REGS /* Nothing after this line! */ };
Add the minimal set of EL2 system registers to the vcpu context. Nothing uses them just yet. Signed-off-by: Marc Zyngier <maz@kernel.org> --- arch/arm64/include/asm/kvm_host.h | 34 ++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-)