From patchwork Wed Dec 16 11:32:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Holger Assmann X-Patchwork-Id: 11977291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77675C4361B for ; Wed, 16 Dec 2020 11:36:47 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07A0823343 for ; Wed, 16 Dec 2020 11:36:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 07A0823343 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=05XE2GJuzn7YdM8eCl3FJwBW4DcCL8oBMH/Cop45UGg=; b=IAejINlMZKnRIKU+nPWqlz1Z3p nggA6Cx6GZYlvNea4sbwpahyLYIfOV8f4kKiCG0qy45/YAnMIJY4Ir+sY4UHpB3ljkISTsTuIWDZg nHsUxHF9HUydWwH1AHlTyGVwuv5U505+c6LiM5+xHPT77jVQpne7XDJM0mkjZ+JY5fbvjJ9VHXBKX cNEgkXpX4MhdYe0HjOF0nkFI4lLeUYVB7R5O+xUvwNF3rFQRJVNDK5sYyI16DYNOSGns46UU5g3Wf ucykwBk5P6mDo/ALKo4GREv2L665YYIv1fAh0itImYocxlK87YmSD9R02SJ+8mUZltm3jZrWWMPOz eTYtTYOg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpV5d-0005KW-4J; Wed, 16 Dec 2020 11:35:29 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kpV5Z-0005JF-V1 for linux-arm-kernel@lists.infradead.org; Wed, 16 Dec 2020 11:35:27 +0000 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kpV5N-00008t-S2; Wed, 16 Dec 2020 12:35:13 +0100 Received: from has by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1kpV5I-00CVWc-IM; Wed, 16 Dec 2020 12:35:08 +0100 From: Holger Assmann To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Maxime Coquelin , Rayagond Kokatanur Subject: [PATCH 1/2] net: stmmac: retain PTP-clock at hwtstamp_set Date: Wed, 16 Dec 2020 12:32:38 +0100 Message-Id: <20201216113239.2980816-1-h.assmann@pengutronix.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: has@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201216_063526_147013_EBF84187 X-CRM114-Status: GOOD ( 26.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jose Abreu , Ahmad Fatoum , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Olbrich , Holger Assmann , linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As it is, valid SIOCSHWTSTAMP ioctl calls - i.e. enable/disable time stamping or changing filter settings - lead to synchronization of the NIC's hardware clock with CLOCK_REALTIME. This might be necessary during system initialization, but at runtime, when the PTP clock has already been synchronized to a grand master, a reset of the timestamp settings might result in a clock jump. This further differs from how drivers like IGB and FEC behave: Those initialize the PTP system time less frequently - on interface up and at probe time, respectively. We consequently introduce the new function stmmac_init_hwtstamp(), which gets called during ndo_open(). It contains the code snippet moved from stmmac_hwtstamp_set() that manages the time synchronization. Besides, the sub second increment configuration is also moved here since the related values are hardware dependent and do not change during runtime. Furthermore, the hardware clock must be kept running even when no time stamping mode is selected in order to retain the once synced time basis. That way, time stamping can be enabled again at any time only with the need for compensation of the clock's natural drifting. As a side effect, this patch fixes a potential race between SIOCSHWTSTAMP and ptp_clock_info::enable regarding priv->systime_flags. Subsequently, since this variable becomes deprecated by this commit, it should be removed completely in a follow-up patch. Fixes: 92ba6888510c ("stmmac: add the support for PTP hw clock driver") Fixes: cc4c9001ce31 ("net: stmmac: Switch stmmac_hwtimestamp to generic HW Interface Helpers") Reported-by: Michael Olbrich Signed-off-by: Ahmad Fatoum Signed-off-by: Holger Assmann --- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 121 ++++++++++++------ 1 file changed, 80 insertions(+), 41 deletions(-) base-commit: 3db1a3fa98808aa90f95ec3e0fa2fc7abf28f5c9 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 5b1c12ff98c0..55f5e6cd1cad 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -46,6 +46,13 @@ #include "dwxgmac2.h" #include "hwif.h" + +/* As long the interface is active, we keep the timestamping HW enabled with + * fine resolution and binary rollover. This avoid non-monotonic behavior + * when changing timestamp settings at runtime + * */ +#define STMMAC_HWTS_ACTIVE (PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | PTP_TCR_TSCTRLSSR) + #define STMMAC_ALIGN(x) ALIGN(ALIGN(x, SMP_CACHE_BYTES), 16) #define TSO_MAX_BUFF_SIZE (SZ_16K - 1) @@ -509,8 +516,6 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) { struct stmmac_priv *priv = netdev_priv(dev); struct hwtstamp_config config; - struct timespec64 now; - u64 temp = 0; u32 ptp_v2 = 0; u32 tstamp_all = 0; u32 ptp_over_ipv4_udp = 0; @@ -519,7 +524,6 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) u32 snap_type_sel = 0; u32 ts_master_en = 0; u32 ts_event_en = 0; - u32 sec_inc = 0; u32 value = 0; bool xmac; @@ -686,39 +690,16 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) priv->hwts_tx_en = config.tx_type == HWTSTAMP_TX_ON; if (!priv->hwts_tx_en && !priv->hwts_rx_en) - stmmac_config_hw_tstamping(priv, priv->ptpaddr, 0); + stmmac_config_hw_tstamping(priv, priv->ptpaddr, STMMAC_HWTS_ACTIVE); else { - value = (PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | PTP_TCR_TSCTRLSSR | + value = (STMMAC_HWTS_ACTIVE | tstamp_all | ptp_v2 | ptp_over_ethernet | ptp_over_ipv6_udp | ptp_over_ipv4_udp | ts_event_en | ts_master_en | snap_type_sel); stmmac_config_hw_tstamping(priv, priv->ptpaddr, value); - - /* program Sub Second Increment reg */ - stmmac_config_sub_second_increment(priv, - priv->ptpaddr, priv->plat->clk_ptp_rate, - xmac, &sec_inc); - temp = div_u64(1000000000ULL, sec_inc); - - /* Store sub second increment and flags for later use */ - priv->sub_second_inc = sec_inc; + + /* Store flags for later use */ priv->systime_flags = value; - - /* calculate default added value: - * formula is : - * addend = (2^32)/freq_div_ratio; - * where, freq_div_ratio = 1e9ns/sec_inc - */ - temp = (u64)(temp << 32); - priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate); - stmmac_config_addend(priv, priv->ptpaddr, priv->default_addend); - - /* initialize system time */ - ktime_get_real_ts64(&now); - - /* lower 32 bits of tv_sec are safe until y2106 */ - stmmac_init_systime(priv, priv->ptpaddr, - (u32)now.tv_sec, now.tv_nsec); } memcpy(&priv->tstamp_config, &config, sizeof(config)); @@ -791,6 +772,63 @@ static void stmmac_release_ptp(struct stmmac_priv *priv) stmmac_ptp_unregister(priv); } +/** + * stmmac_init_hwtstamp - init Timestamping Hardware + * @priv: driver private structure + * Description: Initialize hardware for Timestamping use + * This is valid as long as the interface is open and not suspended. + * Will be rerun after resume from suspension. + */ +static int stmmac_init_hwtstamp(struct stmmac_priv *priv) +{ + bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac; + struct timespec64 now; + u32 sec_inc = 0; + u64 temp = 0; + u32 value; + int ret; + + ret = clk_prepare_enable(priv->plat->clk_ptp_ref); + if (ret < 0) { + netdev_warn(priv->dev, "failed to enable PTP reference clock: %d\n", ret); + return ret; + } + + if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) + return -EOPNOTSUPP; + + value = STMMAC_HWTS_ACTIVE; + stmmac_config_hw_tstamping(priv, priv->ptpaddr, value); + + /* program Sub Second Increment reg */ + stmmac_config_sub_second_increment(priv, + priv->ptpaddr, priv->plat->clk_ptp_rate, + xmac, &sec_inc); + temp = div_u64(1000000000ULL, sec_inc); + + /* Store sub second increment and flags for later use */ + priv->sub_second_inc = sec_inc; + priv->systime_flags = value; + + /* calculate default added value: + * formula is : + * addend = (2^32)/freq_div_ratio; + * where, freq_div_ratio = 1e9ns/sec_inc + */ + temp = (u64)(temp << 32); + priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate); + stmmac_config_addend(priv, priv->ptpaddr, priv->default_addend); + + /* initialize system time */ + ktime_get_real_ts64(&now); + + /* lower 32 bits of tv_sec are safe until y2106 */ + stmmac_init_systime(priv, priv->ptpaddr, + (u32)now.tv_sec, now.tv_nsec); + + return 0; +} + /** * stmmac_mac_flow_ctrl - Configure flow control in all queues * @priv: driver private structure @@ -2713,15 +2751,17 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) stmmac_mmc_setup(priv); if (init_ptp) { - ret = clk_prepare_enable(priv->plat->clk_ptp_ref); - if (ret < 0) - netdev_warn(priv->dev, "failed to enable PTP reference clock: %d\n", ret); - - ret = stmmac_init_ptp(priv); - if (ret == -EOPNOTSUPP) - netdev_warn(priv->dev, "PTP not supported by HW\n"); - else if (ret) - netdev_warn(priv->dev, "PTP init failed\n"); + ret = stmmac_init_hwtstamp(priv); + if (ret) { + netdev_warn(priv->dev, "HW Timestamping init failed: %pe\n", + ERR_PTR(ret)); + } else { + ret = stmmac_init_ptp(priv); + if (ret == -EOPNOTSUPP) + netdev_warn(priv->dev, "PTP not supported by HW\n"); + else if (ret) + netdev_warn(priv->dev, "PTP init failed\n"); + } } priv->eee_tw_timer = STMMAC_DEFAULT_TWT_LS; @@ -5290,8 +5330,7 @@ int stmmac_resume(struct device *dev) /* enable the clk previously disabled */ clk_prepare_enable(priv->plat->stmmac_clk); clk_prepare_enable(priv->plat->pclk); - if (priv->plat->clk_ptp_ref) - clk_prepare_enable(priv->plat->clk_ptp_ref); + stmmac_init_hwtstamp(priv); /* reset the phy so that it's ready */ if (priv->mii) stmmac_mdio_reset(priv->mii);