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Thu, 17 Dec 2020 09:41:48 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Thu, 17 Dec 2020 15:41:46 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Thu, 17 Dec 2020 15:41:46 +0000 Received: from AUSNPC0LSNW1-debian.cirrus.com (AUSNPC0LSNW1.ad.cirrus.com [198.61.64.236]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 304CF11CB; Thu, 17 Dec 2020 15:41:46 +0000 (UTC) From: Richard Fitzgerald To: , , , Subject: [PATCH v3 2/6] ASoC: audio-graph-card: Add plls and sysclks DT bindings Date: Thu, 17 Dec 2020 15:41:38 +0000 Message-ID: <20201217154142.24301-3-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201217154142.24301-1-rf@opensource.cirrus.com> References: <20201217154142.24301-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 adultscore=0 mlxscore=0 mlxlogscore=999 suspectscore=0 spamscore=0 clxscore=1015 malwarescore=0 impostorscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2012170108 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201217_104155_188087_629C8C08 X-CRM114-Status: GOOD ( 18.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, patches@opensource.cirrus.com, linux-kernel@vger.kernel.org, Richard Fitzgerald , bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The audio-graph-card driver has bindings for configuring the clocking for DAIs within a component, but is missing bindings for setting up the PLLs and sysclks of the component. This patch adds the two new bindings 'plls' and 'sysclks' so that the audio-graph-driver can fully configure the component clocking. Signed-off-by: Richard Fitzgerald --- .../bindings/sound/audio-graph-card.txt | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card.txt b/Documentation/devicetree/bindings/sound/audio-graph-card.txt index d5f6919a2d69..30405e64cfbb 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph-card.txt +++ b/Documentation/devicetree/bindings/sound/audio-graph-card.txt @@ -32,6 +32,40 @@ Required properties: Optional properties: - pa-gpios: GPIO used to control external amplifier. +- plls: A list of component pll settings. There are 4 cells per PLL setting: + - phandle to the node of the codec or cpu component, + - component PLL id, + - component clock source id, + - frequency (in Hz) of the PLL output clock. + + The PLL id and clock source id are specific to the particular component + so see the relevant component driver for the ids. Typically the + clock source id indicates the pin the source clock is connected to. + + The same phandle can appear in multiple entries so that several plls + can be set in the same component. + +- plls-clocks: A list of clock names giving the source clock for each setting + in the plls property. + +- sysclks: A list of component sysclk settings. There are 4 cells per sysclk + setting: + - phandle to the node of the codec or cpu component, + - component sysclk id, + - component clock source id, + - direction of the clock: 0 if the clock is an input to the component, + 1 if it is an output. + + The sysclk id and clock source id are specific to the particular + component so see the relevant component driver for the ids. Typically + the clock source id indicates the pin the source clock is connected to. + + The same phandle can appear in multiple entries so that several sysclks + can be set in the same component. + +- sysclks-clocks: A list of clock names giving the source clock for each setting + in the sysclks property. + ----------------------- Example: Single DAI case ----------------------- @@ -335,3 +369,41 @@ Example: Multi DAI with DPCM }; }; }; + +----------------------- +Example: Set component sysclks and PLLs +----------------------- + + sound { + compatible = "audio-graph-card"; + + clocks = <&audioclk>, <&pll1>; + clock-names = "audioclk", "pll1"; + + plls = <&cs47l15 MADERA_FLL1_REFCLK MADERA_FLL_SRC_MCLK1 98304000>; + plls-clocks = "audioclk"; + + sysclks = <&cs47l15 MADERA_CLK_SYSCLK_1 MADERA_CLK_SRC_FLL1 0>; + sysclks-clocks = "pll1"; + + dais = <&cpu_i2s_port>; + + pll1: pll1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <98304000>; + }; + }; + + cs47l15: codec@0 { + ... + ports { + #address-cells = <1>; + #size-cells = <0>; + cs47l15_aif1_port: port@0 { + reg = <0>; + cs47l15_aif1: endpoint { + remote-endpoint = <&cpu_i2s_endpoint>; + }; + }; + };