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IPV:NLI; SFV:NSPM; H:AM6PR04MB6053.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(39860400002)(346002)(366004)(136003)(376002)(396003)(66946007)(26005)(2906002)(316002)(8936002)(6486002)(86362001)(66476007)(52116002)(66556008)(8676002)(6506007)(4326008)(478600001)(956004)(2616005)(5660300002)(1076003)(6666004)(83380400001)(16526019)(6512007)(186003)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: vY3/JwnxZHrU4zayBXGkGGD6KMtFLhqBZc1hTUzAL3JgPh/N9GQOcQJ2QjMRnrugx6JD5VrnIbdpmXzACUfaxRoQmessk+caS/jyd4SWJxaMdZTM/hi39j/Z3cc3mmPoLjjxdqkYdO5phE6jkAc76ZIHSwXpZZM7zXiQsZlYIhV+XKrXdF1ilBOr3+4TCxZs8DZe+DwhM98c/xgVE4FiBCN7ixlMxfkLIszZ4SDL4vTVCxaDejBvA1ngBlQa5Jp12eI2mv9dQx9v/UkkS4svvLcT6PxuHZb7Ma58BQj/bKMLOc3/1sdOGSQwVZMC2Ve4clSUYKQApzn9a900AMchuS/GeJQJ0nlHJtmgnX/fJitCcHXrrHWqCyivP8JCZs1i90bxd58cjb4JOBCVKjzWGCY/AKU3belQS+f322+WnV3egSXAEHM9esnInvI9sXkh8I0+zTk5l4XGg7ERmCf8lAksQ1ISkLIxEEKvU7zBrzC1jJHip3xnIDxrE+SJ04r8kAdk6f7s27uhWuinDDEBZjso/J31EhhPjnPz2QWk1AeyItgxWT+tSfMt4/zl1+5bMwupE9XI5YdQ1N6YK7s8b8kQEtkImJ6W8g4pAU3A+YgPc6vWqI+fC453dFTOwPoIUJegMRvbMAO3MFNyTL0uga1vD8pHfj7PUsd8/nIVTi9yrBEd/r+a5LtWCCHPhLabhXThy0Qx/KYJNYVwKf8zlMwxHglYCWgaaJaWWZ0c1snNHDBG6O0EZasxyS3eFhZ7HOPzQ/5nxDpl/1x1+mVcfiIdlrBz10ZfZsWvqves9PAL9MGRHwCJNSzZ8Xh30sHzrJZRY/Hk5xhS2VMz9GzTGqkb/S32ubf2idLxy0+/7gFp0CMpk6Fq4OPVHl067pw/pYpVOQWZ6seQpjY771wtyTKTVkLGG1Ms5PDmSiF9iXKaC4Fes17/pAigg1b5r03FBnmNhQ/6fvkfgPXQwX6swuYBtpSWQsvxdtu8fe9dQ8uDvbTc0I+aUmVjQhvnMahs X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB6053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Dec 2020 08:11:32.1791 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-Network-Message-Id: 23e6411d-cbec-4ec4-6ab0-08d8a6513150 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: N+vEA2czf/Zxyf90yMo0DNuLwOBjQ25hyLwrIUR/mM6/3Fv7DKrd0OZm1mBTakZV3YkZ+9WYHEva5MG3sE0mNg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0402MB3752 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201222_031135_396862_DF844529 X-CRM114-Status: GOOD ( 13.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Alice Guo In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alice Guo --- Changes for v9: - re-add Reviewed-by because it was lost in v8 Changes for v8: - lost Reviewed-by carelessly Changes for v7: - add Reviewed-by Changes for v6: - leave only the changelog under '---' Changes for v5: - change underscore of device node to hyphen Changes for v4: - delete "stuff" in subject and commit message - add detailed description Changes for v3: - convert register addresses and sizes to hex Changes for v2: - remove the subject prefix "LF-2571-3" arch/arm64/boot/dts/freescale/imx8mm.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++ arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 ++++++ 4 files changed, 24 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index d457ce815e68..9bee6f1889a4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -261,6 +261,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mm_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -518,6 +520,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mm_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index db50e6e01ac5..b344fdc16534 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -245,6 +245,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mn_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -531,6 +533,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mn_uid: unique-id@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index ec6ac523ecfc..9401e92f1c84 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -222,6 +222,8 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; + nvmem-cells = <&imx8mp_uid>; + nvmem-cell-names = "soc_unique_id"; aips1: bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; @@ -328,6 +330,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mp_uid: unique-id@420 { + reg = <0x8 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9b6d9307e5d7..a2a885f1a07a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -291,6 +291,8 @@ #size-cells = <1>; ranges = <0x0 0x0 0x0 0x3e000000>; dma-ranges = <0x40000000 0x0 0x40000000 0xc0000000>; + nvmem-cells = <&imx8mq_uid>; + nvmem-cell-names = "soc_unique_id"; bus@30000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; @@ -555,6 +557,10 @@ #address-cells = <1>; #size-cells = <1>; + imx8mq_uid: soc-uid@410 { + reg = <0x4 0x8>; + }; + cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; };