diff mbox series

[2/5] ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoM

Message ID 20201223191402.378560-3-jagan@amarulasolutions.com (mailing list archive)
State New, archived
Headers show
Series ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 | expand

Commit Message

Jagan Teki Dec. 23, 2020, 7:13 p.m. UTC
MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S

MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
 1 file changed, 147 insertions(+)
 create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi

Comments

Alexandre TORGUE Jan. 25, 2021, 3:05 p.m. UTC | #1
Hi,

On 12/23/20 8:13 PM, Jagan Teki wrote:
> MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
> 
> General features:
> - STM32MP157AAC
> - Up to 1GB DDR3L-800
> - 512MB Nand flash
> - I2S
> 
> MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
> boards for creating complete platform solutions.
> 
> Add support for it.
> 
> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
> Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>   .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
>   1 file changed, 147 insertions(+)
>   create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> 
> diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> new file mode 100644
> index 000000000000..97d569107bfe
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> @@ -0,0 +1,147 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
> + * Copyright (c) 2020 Engicam srl
> + * Copyright (c) 2020 Amarula Solutons(India)
> + */
> +

If STM32MP157AAC is soldered onto this board, you should include SoC 
dtsi here and no into MicroDev 2.0 board. No ?

+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxaa-pinctrl.dtsi"


Regards
Alex

> +/ {
> +	compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
> +
> +	memory@c0000000 {
> +		reg = <0xc0000000 0x10000000>;
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		mcuram2: mcuram2@10000000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10000000 0x40000>;
> +			no-map;
> +		};
> +
> +		vdev0vring0: vdev0vring0@10040000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10040000 0x1000>;
> +			no-map;
> +		};
> +
> +		vdev0vring1: vdev0vring1@10041000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10041000 0x1000>;
> +			no-map;
> +		};
> +
> +		vdev0buffer: vdev0buffer@10042000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x10042000 0x4000>;
> +			no-map;
> +		};
> +
> +		mcuram: mcuram@30000000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x30000000 0x40000>;
> +			no-map;
> +		};
> +
> +		retram: retram@38000000 {
> +			compatible = "shared-dma-pool";
> +			reg = <0x38000000 0x10000>;
> +			no-map;
> +		};
> +	};
> +
> +	vin: regulator-vin {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vin";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-always-on;
> +	};
> +
> +	vddcore: regulator-vddcore {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vddcore";
> +		regulator-min-microvolt = <1200000>;
> +		regulator-max-microvolt = <1200000>;
> +		regulator-always-on;
> +		vin-supply = <&vin>;
> +	};
> +
> +	vdd: regulator-vdd {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-always-on;
> +		vin-supply = <&vin>;
> +	};
> +
> +	vddq_ddr: regulator-vddq-ddr {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vddq_ddr";
> +		regulator-min-microvolt = <1350000>;
> +		regulator-max-microvolt = <1350000>;
> +		regulator-always-on;
> +		vin-supply = <&vin>;
> +	};
> +};
> +
> +&dts {
> +	status = "okay";
> +};
> +
> +&fmc {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&fmc_pins_a>;
> +	pinctrl-1 = <&fmc_sleep_pins_a>;
> +	status = "okay";
> +
> +	nand-controller@4,0 {
> +		status = "okay";
> +
> +		nand@0 {
> +			reg = <0>;
> +			nand-on-flash-bbt;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +		};
> +	};
> +};
> +
> +&ipcc {
> +	status = "okay";
> +};
> +
> +&iwdg2{
> +	timeout-sec = <32>;
> +	status = "okay";
> +};
> +
> +&m4_rproc{
> +	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
> +			<&vdev0vring1>, <&vdev0buffer>;
> +	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
> +	mbox-names = "vq0", "vq1", "shutdown";
> +	interrupt-parent = <&exti>;
> +	interrupts = <68 1>;
> +	status = "okay";
> +};
> +
> +&rng1 {
> +	status = "okay";
> +};
> +
> +&rtc{
> +	status = "okay";
> +};
> +
> +&vrefbuf {
> +	regulator-min-microvolt = <2500000>;
> +	regulator-max-microvolt = <2500000>;
> +	vdda-supply = <&vdd>;
> +	status = "okay";
> +};
>
Alexandre Torgue Jan. 25, 2021, 3:07 p.m. UTC | #2
On 1/25/21 4:05 PM, Alexandre TORGUE wrote:
> Hi,
> 
> On 12/23/20 8:13 PM, Jagan Teki wrote:
>> MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
>>
>> General features:
>> - STM32MP157AAC
>> - Up to 1GB DDR3L-800
>> - 512MB Nand flash
>> - I2S
>>
>> MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
>> boards for creating complete platform solutions.
>>
>> Add support for it.
>>
>> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
>> Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
>> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>> ---
>>   .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
>>   1 file changed, 147 insertions(+)
>>   create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>>
>> diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi 
>> b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>> new file mode 100644
>> index 000000000000..97d569107bfe
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>> @@ -0,0 +1,147 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
>> +/*
>> + * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
>> + * Copyright (c) 2020 Engicam srl
>> + * Copyright (c) 2020 Amarula Solutons(India)
>> + */
>> +
> 
> If STM32MP157AAC is soldered onto this board, you should include SoC 
> dtsi here and no into MicroDev 2.0 board. No ?
> 
> +#include "stm32mp15-pinctrl.dtsi"
> +#include "stm32mp15xxaa-pinctrl.dtsi"

and this one:
+#include "stm32mp157.dtsi"

> 
> 
> Regards
> Alex
> 
>> +/ {
>> +    compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
>> +
>> +    memory@c0000000 {
>> +        reg = <0xc0000000 0x10000000>;
>> +    };
>> +
>> +    reserved-memory {
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +        ranges;
>> +
>> +        mcuram2: mcuram2@10000000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x10000000 0x40000>;
>> +            no-map;
>> +        };
>> +
>> +        vdev0vring0: vdev0vring0@10040000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x10040000 0x1000>;
>> +            no-map;
>> +        };
>> +
>> +        vdev0vring1: vdev0vring1@10041000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x10041000 0x1000>;
>> +            no-map;
>> +        };
>> +
>> +        vdev0buffer: vdev0buffer@10042000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x10042000 0x4000>;
>> +            no-map;
>> +        };
>> +
>> +        mcuram: mcuram@30000000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x30000000 0x40000>;
>> +            no-map;
>> +        };
>> +
>> +        retram: retram@38000000 {
>> +            compatible = "shared-dma-pool";
>> +            reg = <0x38000000 0x10000>;
>> +            no-map;
>> +        };
>> +    };
>> +
>> +    vin: regulator-vin {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "vin";
>> +        regulator-min-microvolt = <5000000>;
>> +        regulator-max-microvolt = <5000000>;
>> +        regulator-always-on;
>> +    };
>> +
>> +    vddcore: regulator-vddcore {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "vddcore";
>> +        regulator-min-microvolt = <1200000>;
>> +        regulator-max-microvolt = <1200000>;
>> +        regulator-always-on;
>> +        vin-supply = <&vin>;
>> +    };
>> +
>> +    vdd: regulator-vdd {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "vdd";
>> +        regulator-min-microvolt = <3300000>;
>> +        regulator-max-microvolt = <3300000>;
>> +        regulator-always-on;
>> +        vin-supply = <&vin>;
>> +    };
>> +
>> +    vddq_ddr: regulator-vddq-ddr {
>> +        compatible = "regulator-fixed";
>> +        regulator-name = "vddq_ddr";
>> +        regulator-min-microvolt = <1350000>;
>> +        regulator-max-microvolt = <1350000>;
>> +        regulator-always-on;
>> +        vin-supply = <&vin>;
>> +    };
>> +};
>> +
>> +&dts {
>> +    status = "okay";
>> +};
>> +
>> +&fmc {
>> +    pinctrl-names = "default", "sleep";
>> +    pinctrl-0 = <&fmc_pins_a>;
>> +    pinctrl-1 = <&fmc_sleep_pins_a>;
>> +    status = "okay";
>> +
>> +    nand-controller@4,0 {
>> +        status = "okay";
>> +
>> +        nand@0 {
>> +            reg = <0>;
>> +            nand-on-flash-bbt;
>> +            #address-cells = <1>;
>> +            #size-cells = <1>;
>> +        };
>> +    };
>> +};
>> +
>> +&ipcc {
>> +    status = "okay";
>> +};
>> +
>> +&iwdg2{
>> +    timeout-sec = <32>;
>> +    status = "okay";
>> +};
>> +
>> +&m4_rproc{
>> +    memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
>> +            <&vdev0vring1>, <&vdev0buffer>;
>> +    mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
>> +    mbox-names = "vq0", "vq1", "shutdown";
>> +    interrupt-parent = <&exti>;
>> +    interrupts = <68 1>;
>> +    status = "okay";
>> +};
>> +
>> +&rng1 {
>> +    status = "okay";
>> +};
>> +
>> +&rtc{
>> +    status = "okay";
>> +};
>> +
>> +&vrefbuf {
>> +    regulator-min-microvolt = <2500000>;
>> +    regulator-max-microvolt = <2500000>;
>> +    vdda-supply = <&vdd>;
>> +    status = "okay";
>> +};
>>
Jagan Teki Feb. 24, 2021, 6:05 p.m. UTC | #3
On Mon, Jan 25, 2021 at 8:35 PM Alexandre TORGUE
<alexandre.torgue@foss.st.com> wrote:
>
> Hi,
>
> On 12/23/20 8:13 PM, Jagan Teki wrote:
> > MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
> >
> > General features:
> > - STM32MP157AAC
> > - Up to 1GB DDR3L-800
> > - 512MB Nand flash
> > - I2S
> >
> > MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
> > boards for creating complete platform solutions.
> >
> > Add support for it.
> >
> > Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
> > Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
> > Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> >   .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
> >   1 file changed, 147 insertions(+)
> >   create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> >
> > diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> > new file mode 100644
> > index 000000000000..97d569107bfe
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> > @@ -0,0 +1,147 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> > +/*
> > + * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
> > + * Copyright (c) 2020 Engicam srl
> > + * Copyright (c) 2020 Amarula Solutons(India)
> > + */
> > +
>
> If STM32MP157AAC is soldered onto this board, you should include SoC
> dtsi here and no into MicroDev 2.0 board. No ?

No, it's an SoM dtsi. and it can be associated with the respective
carrier board and include files are attached in its dts.

Please check the next patches on this series.

Jagan.
Alexandre TORGUE Feb. 26, 2021, 3:09 p.m. UTC | #4
Hi Jagan

On 2/24/21 7:05 PM, Jagan Teki wrote:
> On Mon, Jan 25, 2021 at 8:35 PM Alexandre TORGUE
> <alexandre.torgue@foss.st.com> wrote:
>>
>> Hi,
>>
>> On 12/23/20 8:13 PM, Jagan Teki wrote:
>>> MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
>>>
>>> General features:
>>> - STM32MP157AAC
>>> - Up to 1GB DDR3L-800
>>> - 512MB Nand flash
>>> - I2S
>>>
>>> MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
>>> boards for creating complete platform solutions.
>>>
>>> Add support for it.
>>>
>>> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
>>> Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
>>> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
>>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>>> ---
>>>    .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
>>>    1 file changed, 147 insertions(+)
>>>    create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>>> new file mode 100644
>>> index 000000000000..97d569107bfe
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
>>> @@ -0,0 +1,147 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
>>> +/*
>>> + * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
>>> + * Copyright (c) 2020 Engicam srl
>>> + * Copyright (c) 2020 Amarula Solutons(India)
>>> + */
>>> +
>>
>> If STM32MP157AAC is soldered onto this board, you should include SoC
>> dtsi here and no into MicroDev 2.0 board. No ?
> 
> No, it's an SoM dtsi. and it can be associated with the respective
> carrier board and include files are attached in its dts.
> 
> Please check the next patches on this series.
Ok, I thought it was a mistake as you mentioned "- STM32MP157AAC" in 
your commit message.

regards
alex



> Jagan.
>
Jagan Teki Feb. 26, 2021, 3:10 p.m. UTC | #5
On Fri, Feb 26, 2021 at 8:39 PM Alexandre TORGUE
<alexandre.torgue@foss.st.com> wrote:
>
> Hi Jagan
>
> On 2/24/21 7:05 PM, Jagan Teki wrote:
> > On Mon, Jan 25, 2021 at 8:35 PM Alexandre TORGUE
> > <alexandre.torgue@foss.st.com> wrote:
> >>
> >> Hi,
> >>
> >> On 12/23/20 8:13 PM, Jagan Teki wrote:
> >>> MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
> >>>
> >>> General features:
> >>> - STM32MP157AAC
> >>> - Up to 1GB DDR3L-800
> >>> - 512MB Nand flash
> >>> - I2S
> >>>
> >>> MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
> >>> boards for creating complete platform solutions.
> >>>
> >>> Add support for it.
> >>>
> >>> Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
> >>> Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
> >>> Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
> >>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> >>> ---
> >>>    .../dts/stm32mp157a-microgea-stm32mp1.dtsi    | 147 ++++++++++++++++++
> >>>    1 file changed, 147 insertions(+)
> >>>    create mode 100644 arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> >>>
> >>> diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> >>> new file mode 100644
> >>> index 000000000000..97d569107bfe
> >>> --- /dev/null
> >>> +++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
> >>> @@ -0,0 +1,147 @@
> >>> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> >>> +/*
> >>> + * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
> >>> + * Copyright (c) 2020 Engicam srl
> >>> + * Copyright (c) 2020 Amarula Solutons(India)
> >>> + */
> >>> +
> >>
> >> If STM32MP157AAC is soldered onto this board, you should include SoC
> >> dtsi here and no into MicroDev 2.0 board. No ?
> >
> > No, it's an SoM dtsi. and it can be associated with the respective
> > carrier board and include files are attached in its dts.
> >
> > Please check the next patches on this series.
> Ok, I thought it was a mistake as you mentioned "- STM32MP157AAC" in
> your commit message.

Please check, v2 for this series. thanks!

Jagan.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
new file mode 100644
index 000000000000..97d569107bfe
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1.dtsi
@@ -0,0 +1,147 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
+ * Copyright (c) 2020 Engicam srl
+ * Copyright (c) 2020 Amarula Solutons(India)
+ */
+
+/ {
+	compatible = "engicam,microgea-stm32mp1", "st,stm32mp157";
+
+	memory@c0000000 {
+		reg = <0xc0000000 0x10000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		mcuram2: mcuram2@10000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10000000 0x40000>;
+			no-map;
+		};
+
+		vdev0vring0: vdev0vring0@10040000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10040000 0x1000>;
+			no-map;
+		};
+
+		vdev0vring1: vdev0vring1@10041000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10041000 0x1000>;
+			no-map;
+		};
+
+		vdev0buffer: vdev0buffer@10042000 {
+			compatible = "shared-dma-pool";
+			reg = <0x10042000 0x4000>;
+			no-map;
+		};
+
+		mcuram: mcuram@30000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x30000000 0x40000>;
+			no-map;
+		};
+
+		retram: retram@38000000 {
+			compatible = "shared-dma-pool";
+			reg = <0x38000000 0x10000>;
+			no-map;
+		};
+	};
+
+	vin: regulator-vin {
+		compatible = "regulator-fixed";
+		regulator-name = "vin";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+
+	vddcore: regulator-vddcore {
+		compatible = "regulator-fixed";
+		regulator-name = "vddcore";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-always-on;
+		vin-supply = <&vin>;
+	};
+
+	vdd: regulator-vdd {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&vin>;
+	};
+
+	vddq_ddr: regulator-vddq-ddr {
+		compatible = "regulator-fixed";
+		regulator-name = "vddq_ddr";
+		regulator-min-microvolt = <1350000>;
+		regulator-max-microvolt = <1350000>;
+		regulator-always-on;
+		vin-supply = <&vin>;
+	};
+};
+
+&dts {
+	status = "okay";
+};
+
+&fmc {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&fmc_pins_a>;
+	pinctrl-1 = <&fmc_sleep_pins_a>;
+	status = "okay";
+
+	nand-controller@4,0 {
+		status = "okay";
+
+		nand@0 {
+			reg = <0>;
+			nand-on-flash-bbt;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+	};
+};
+
+&ipcc {
+	status = "okay";
+};
+
+&iwdg2{
+	timeout-sec = <32>;
+	status = "okay";
+};
+
+&m4_rproc{
+	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
+			<&vdev0vring1>, <&vdev0buffer>;
+	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
+	mbox-names = "vq0", "vq1", "shutdown";
+	interrupt-parent = <&exti>;
+	interrupts = <68 1>;
+	status = "okay";
+};
+
+&rng1 {
+	status = "okay";
+};
+
+&rtc{
+	status = "okay";
+};
+
+&vrefbuf {
+	regulator-min-microvolt = <2500000>;
+	regulator-max-microvolt = <2500000>;
+	vdda-supply = <&vdd>;
+	status = "okay";
+};