From patchwork Tue Dec 29 11:47:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 11992219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB3EEC433DB for ; Tue, 29 Dec 2020 11:49:43 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 741CB206DC for ; Tue, 29 Dec 2020 11:49:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 741CB206DC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=walle.cc Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=o6vKGJz3xLOmEruiJodyRAbkdoCc4DBhx4/xMZHiErI=; b=e2SAZtnm3his4pgvIf6OfT9B5 tUIOprRx1qz2JTCGGOXSma4tUOhCd6HLZwfR289oOhJlXKEfu4Q582oWSzIiLsb7AGtdUQ4XP34+W Du0UvLZ0LrMbR6i5bYoaV5yQDwqUl6VNSxgic1eW8nleaxsLdJO8s6w9JjhN/3RTByUI93vQQXmVf FUlv7L6AHxYZjSI5HrojNJ3/htUQvOXp0a1hbu8ROT94wPoTcDj4MquZFgLd8XRfsjoidS5QrojxM g+xV29O+XQXF+uVqNof1BjFoy5mOzemeZmi3wZSFq6V1EqtwvSmpEplkVPGI5MrwFI9WtwU2x5geA MK4fxc7xg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kuDU2-000356-NH; Tue, 29 Dec 2020 11:48:11 +0000 Received: from ssl.serverraum.org ([176.9.125.105]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kuDTt-00030N-5l for linux-arm-kernel@lists.infradead.org; Tue, 29 Dec 2020 11:48:03 +0000 Received: from mwalle01.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:fa59:71ff:fe9b:b851]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id EEEFE23E43; Tue, 29 Dec 2020 12:47:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1609242468; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bQlqGoKr6Wm+yz109aeAsjU1p/cV+CZQBcKrzaqo7gs=; b=JJv1uN3oBCVuJBb/IHRGCrbn/QKJzysHLM3AfJBmik1KBRAeWPTq/U4fjvXMp+ULisA7/K 5+lsdouTucoQJueIqUOTEAogbx0QgD0XghgdJRS/Favt/tcTcj8ubk6fmeb50FR4I8g4rH Z7UdRA1ELtO/SER43Qvs55l03zRSeVo= From: Michael Walle To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/7] arm64: dts: ls1012a: use constants in the clockgen phandle Date: Tue, 29 Dec 2020 12:47:34 +0100 Message-Id: <20201229114740.7936-2-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201229114740.7936-1-michael@walle.cc> References: <20201229114740.7936-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201229_064801_568454_E3F73562 X-CRM114-Status: GOOD ( 11.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Walle , Rob Herring , Shawn Guo , Li Yang Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle --- .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 60 +++++++++++++------ 1 file changed, 43 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 626b709d1fb9..7de6b376d792 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -7,6 +7,7 @@ * */ +#include #include #include @@ -34,7 +35,7 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; - clocks = <&clockgen 1 0>; + clocks = <&clockgen QORIQ_CLK_CMUX 0>; #cooling-cells = <2>; cpu-idle-states = <&CPU_PH20>; }; @@ -148,7 +149,10 @@ reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = ; clock-names = "qspi_en", "qspi"; - clocks = <&clockgen 4 0>, <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; status = "disabled"; }; @@ -156,7 +160,8 @@ compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; interrupts = <0 62 0x4>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian; @@ -174,7 +179,8 @@ compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; reg = <0x0 0x1580000 0x0 0x10000>; interrupts = <0 65 0x4>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian; @@ -341,7 +347,8 @@ #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; status = "disabled"; }; @@ -351,7 +358,8 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; status = "disabled"; }; @@ -362,7 +370,8 @@ reg = <0x0 0x2100000 0x0 0x10000>; interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>; clock-names = "dspi"; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; spi-num-chipselects = <5>; big-endian; status = "disabled"; @@ -372,7 +381,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; status = "disabled"; }; @@ -380,7 +390,8 @@ compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0600 0x0 0x100>; interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; status = "disabled"; }; @@ -409,7 +420,7 @@ "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; big-endian; }; @@ -418,8 +429,14 @@ compatible = "fsl,vf610-sai"; reg = <0x0 0x2b50000 0x0 0x10000>; interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>, <&clockgen 4 3>, - <&clockgen 4 3>, <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; dma-names = "tx", "rx"; dmas = <&edma0 1 47>, @@ -432,8 +449,14 @@ compatible = "fsl,vf610-sai"; reg = <0x0 0x2b60000 0x0 0x10000>; interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 3>, <&clockgen 4 3>, - <&clockgen 4 3>, <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; clock-names = "bus", "mclk1", "mclk2", "mclk3"; dma-names = "tx", "rx"; dmas = <&edma0 1 45>, @@ -453,8 +476,10 @@ dma-channels = <32>; big-endian; clock-names = "dmamux0", "dmamux1"; - clocks = <&clockgen 4 3>, - <&clockgen 4 3>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>, + <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; }; usb0: usb@2f00000 { @@ -473,7 +498,8 @@ <0x0 0x20140520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; dma-coherent; status = "disabled"; };