diff mbox series

[5/7] arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz

Message ID 20210106150525.15403-6-andre.przywara@arm.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: allwinner: Various DT fixes | expand

Commit Message

Andre Przywara Jan. 6, 2021, 3:05 p.m. UTC
In contrast to the H6 (and later) manuals, the A64 datasheet does not
specify any limitations in the maximum possible frequency for eMMC
controllers.
However experimentation has found that a 150 MHz limit similar to other
SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
for the MMC2 controller.

Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
The Pinebook seems to be the an odd exception, since it apparently seems
to work with 200 MHz as well, so overwrite this in its board .dts file.

Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 1 +
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi         | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

Comments

Chen-Yu Tsai Jan. 6, 2021, 3:58 p.m. UTC | #1
On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> In contrast to the H6 (and later) manuals, the A64 datasheet does not
> specify any limitations in the maximum possible frequency for eMMC
> controllers.
> However experimentation has found that a 150 MHz limit similar to other
> SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
> for the MMC2 controller.
>
> Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
> The Pinebook seems to be the an odd exception, since it apparently seems
> to work with 200 MHz as well, so overwrite this in its board .dts file.
>
> Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Please add a fixes tag. This helps with finding the original commit
that introduced the issue and backporting.

This would benefit SoPine / Pine64-LTS users that are using eMMC.

ChenYu

> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts | 1 +
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi         | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> index d07cf05549c3..7ae16541d14f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
> @@ -167,6 +167,7 @@
>         pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
>         vmmc-supply = <&reg_dcdc1>;
>         vqmmc-supply = <&reg_eldo1>;
> +       max-frequency = <200000000>;
>         bus-width = <8>;
>         non-removable;
>         cap-mmc-hw-reset;
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 19e9b8ca8432..57786fc120c3 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -514,7 +514,7 @@
>                         resets = <&ccu RST_BUS_MMC2>;
>                         reset-names = "ahb";
>                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> -                       max-frequency = <200000000>;
> +                       max-frequency = <150000000>;
>                         status = "disabled";
>                         #address-cells = <1>;
>                         #size-cells = <0>;
> --
> 2.17.5
>
> --
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diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
index d07cf05549c3..7ae16541d14f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
@@ -167,6 +167,7 @@ 
 	pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
 	vmmc-supply = <&reg_dcdc1>;
 	vqmmc-supply = <&reg_eldo1>;
+	max-frequency = <200000000>;
 	bus-width = <8>;
 	non-removable;
 	cap-mmc-hw-reset;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 19e9b8ca8432..57786fc120c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -514,7 +514,7 @@ 
 			resets = <&ccu RST_BUS_MMC2>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-			max-frequency = <200000000>;
+			max-frequency = <150000000>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;