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Thu, 07 Jan 2021 10:48:37 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Thu, 7 Jan 2021 16:48:35 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Thu, 7 Jan 2021 16:48:35 +0000 Received: from AUSNPC0LSNW1-debian.cirrus.com (AUSNPC0LSNW1.ad.cirrus.com [198.61.64.226]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 125BC11CB; Thu, 7 Jan 2021 16:48:29 +0000 (UTC) From: Richard Fitzgerald To: , , , , Subject: [PATCH] spi: bcm2835: Set controller max_speed_hz Date: Thu, 7 Jan 2021 16:48:25 +0000 Message-ID: <20210107164825.21919-1-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 clxscore=1011 malwarescore=0 priorityscore=1501 impostorscore=0 bulkscore=0 adultscore=0 mlxscore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2101070099 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210107_114843_504282_1748BBB7 X-CRM114-Status: GOOD ( 14.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@opensource.cirrus.com, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Richard Fitzgerald , bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Set the struct spi_controller max_speed_hz. This is based on the reported source clock frequency during probe. The maximum bus clock is half the source clock (as per the code in bcm2835_spi_transfer_one). If the controller max_speed_hz is not set, the spi core will limit all transfers to 0 Hz so only the minimum possible bus frequency would be used. Signed-off-by: Richard Fitzgerald --- drivers/spi/spi-bcm2835.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 197485f2c2b2..8e161f4f7766 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -1307,6 +1307,8 @@ static int bcm2835_spi_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk), "could not get clk\n"); + ctlr->max_speed_hz = clk_get_rate(bs->clk) / 2; + bs->irq = platform_get_irq(pdev, 0); if (bs->irq <= 0) return bs->irq ? bs->irq : -ENODEV;