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Fri, 08 Jan 2021 10:05:09 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1913.5; Fri, 8 Jan 2021 16:05:07 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.1913.5 via Frontend Transport; Fri, 8 Jan 2021 16:05:07 +0000 Received: from AUSNPC0LSNW1-debian.cirrus.com (AUSNPC0LSNW1.ad.cirrus.com [198.61.64.226]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 0395C11CE; Fri, 8 Jan 2021 16:05:06 +0000 (UTC) From: Richard Fitzgerald To: , , , , Subject: [PATCH v4 2/6] dt-bindings: audio-graph-card: Add plls and sysclks properties Date: Fri, 8 Jan 2021 16:04:57 +0000 Message-ID: <20210108160501.7638-3-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210108160501.7638-1-rf@opensource.cirrus.com> References: <20210108160501.7638-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 malwarescore=0 spamscore=0 clxscore=1015 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2101080091 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210108_110518_397535_2E210196 X-CRM114-Status: GOOD ( 17.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, patches@opensource.cirrus.com, linux-kernel@vger.kernel.org, Richard Fitzgerald , bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The audio-graph-card driver has properties for configuring the clocking for DAIs within a component, but is missing properties for setting up the PLLs and sysclks of the component. This patch adds the two new properties 'plls' and 'sysclks' so that the audio-graph-driver can fully configure the component clocking. Signed-off-by: Richard Fitzgerald --- .../bindings/sound/audio-graph.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/audio-graph.yaml b/Documentation/devicetree/bindings/sound/audio-graph.yaml index 4b46794e5153..9e0819205a17 100644 --- a/Documentation/devicetree/bindings/sound/audio-graph.yaml +++ b/Documentation/devicetree/bindings/sound/audio-graph.yaml @@ -39,6 +39,52 @@ properties: mic-det-gpio: maxItems: 1 + plls: + description: | + A list of component pll settings. There are 4 cells per PLL setting: + - phandle to the node of the codec or cpu component, + - component PLL id, + - component clock source id, + - frequency (in Hz) of the PLL output clock. + The PLL id and clock source id are specific to the particular component + so see the relevant component driver for the ids. Typically the + clock source id indicates the pin the source clock is connected to. + The same phandle can appear in multiple entries so that several plls + can be set in the same component. + $ref: /schemas/types.yaml#/definitions/phandle-array + + plls-clocks: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: | + A list of clock names giving the source clock for each setting + in the plls property. + + sysclks: + description: | + A list of component sysclk settings. There are 4 cells per sysclk + setting: + - phandle to the node of the codec or cpu component, + - component sysclk id, + - component clock source id, + - direction of the clock: 0 if the clock is an input to the component, + 1 if it is an output. + The sysclk id and clock source id are specific to the particular + component so see the relevant component driver for the ids. Typically + the clock source id indicates the pin the source clock is connected to. + The same phandle can appear in multiple entries so that several sysclks + can be set in the same component. + $ref: /schemas/types.yaml#/definitions/phandle-array + + sysclks-clocks: + $ref: /schemas/types.yaml#/definitions/non-unique-string-array + description: | + A list of clock names giving the source clock for each setting + in the sysclks property. + +dependencies: + plls: [ plls-clocks ] + sysclks: [ sysclks-clocks ] + required: - dais