From patchwork Thu Jan 14 12:40:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12019427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 906C0C433DB for ; Thu, 14 Jan 2021 12:42:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5929B239FD for ; Thu, 14 Jan 2021 12:42:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5929B239FD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pIeXeGwrPxExE9iMEGxO3SL29x2pycQUifepZ9l0L34=; b=ZFhZS265pICrNx+k80jNzoJsi tl6Lndp6IRvn1tgHLnq4MQv4GdRaGCf9xVRy8/4Nb6zALJL51WCGwddEezc3lZ9YJP1K+1zVfyw5o eyHZzgbeZH9BLKDYLz6MklfsjLo7l8L0dBj3qYc+5tgT6Qugsx4JmujEQewtMCnQU+/wwkaTeesid Z4KjWL1rXJKRQ6GAm6oQNW7A2nllyqP1BD261XnIWk3PAy7KjVqOpEdjeMVjfksmUiFTILBFY8mgJ zLDWIupxEf8xuA7+eDJ6oJ2ssbLfDGsHRxPn0c3i9jVeTh6406QZrdEPWdtH7tFeYW437KcrI9x2Z jDYMnmKnw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l01wE-0001kA-8A; Thu, 14 Jan 2021 12:41:18 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l01vs-0001fe-Ur for linux-arm-kernel@lists.infradead.org; Thu, 14 Jan 2021 12:41:01 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 2CAA123A62; Thu, 14 Jan 2021 12:40:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1610628056; bh=PHeluWO0cdECj+OdCLH72nVlTA8mvTeQ/OvR4mFUrGc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NyNC/Ie7XzciQ19TjrjNW6NqeDXP1q6blwAVmmUHqKZcMct8Xd8d41r454+/xsXSG f1euTA7CPsUTDHY29mu42PzLoq5I4sLWcrqH6EKbHiJN+mxtZOA3z47/SgoFDhDLcm RIDWw1Jq3nOButTBiuj2HKsjC89yykub2fvN5iGrwxqpuEQwlJ4xpvyZhV7gJQC9UC R1dhwchqJEQLxVhkhJjw3Q+tJUk3Tw8XHtNePnJ3i8Y80UPFz5dlNv5jh31O4VPmYT BXU6csL5R4nSfbvT20OZsKyA2P12GsFmoc+bXbSwXvztsEJTGxiakJJfT2vre65KdZ rMHmkJZaZvWrg== Received: by pali.im (Postfix) id 382A9825; Thu, 14 Jan 2021 13:40:54 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Gregory Clement , Andrew Lunn , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH mvebu v2 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz Date: Thu, 14 Jan 2021 13:40:27 +0100 Message-Id: <20210114124032.12765-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210114124032.12765-1-pali@kernel.org> References: <20210114124032.12765-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210114_074057_179421_0C8500C8 X-CRM114-Status: GOOD ( 14.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marek_Beh=C3=BAn?= , Tomasz Maciej Nowak , Luka Perkov , Andre Heider , Vladimir Vid , Russell King , =?utf-8?q?G=C3=A9rald_Kerma?= , Miquel Raynal , Konstantin Porotchkin Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org It was observed that the workaround introduced by commit 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") when base CPU frequency is 1.2 GHz is also required when base CPU frequency is 1 GHz. Otherwise switching CPU frequency directly from L2 (250 MHz) to L0 (1 GHz) causes a crash. When base CPU frequency is just 800 MHz no crashed were observed during switch from L2 to L0. Signed-off-by: Pali Rohár Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks") Cc: stable@vger.kernel.org # 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") Acked-by: Stephen Boyd --- drivers/clk/mvebu/armada-37xx-periph.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index 6507bd2c5f31..b15e177bea7e 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -487,8 +487,10 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, } /* - * Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz - * respectively) to L0 frequency (1.2 Ghz) requires a significant + * Workaround when base CPU frequnecy is 1000 or 1200 MHz + * + * Switching the CPU from the L2 or L3 frequencies (250/300 or 200 MHz + * respectively) to L0 frequency (1/1.2 GHz) requires a significant * amount of time to let VDD stabilize to the appropriate * voltage. This amount of time is large enough that it cannot be * covered by the hardware countdown register. Due to this, the CPU @@ -498,15 +500,15 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, * To work around this problem, we prevent switching directly from the * L2/L3 frequencies to the L0 frequency, and instead switch to the L1 * frequency in-between. The sequence therefore becomes: - * 1. First switch from L2/L3(200/300MHz) to L1(600MHZ) + * 1. First switch from L2/L3 (200/250/300 MHz) to L1 (500/600 MHz) * 2. Sleep 20ms for stabling VDD voltage - * 3. Then switch from L1(600MHZ) to L0(1200Mhz). + * 3. Then switch from L1 (500/600 MHz) to L0 (1000/1200 MHz). */ static void clk_pm_cpu_set_rate_wa(unsigned long rate, struct regmap *base) { unsigned int cur_level; - if (rate != 1200 * 1000 * 1000) + if (rate < 1000 * 1000 * 1000) return; regmap_read(base, ARMADA_37XX_NB_CPU_LOAD, &cur_level);