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IronPort-SDR: ej0lc+9QZlL8fcZ2/QYpWfNXzGIXe3o0KeV7cJMDx7ASJ9xUVYIYPSni6FXDx5hHyrCYNlrfGB FKZrLjK7axkgUbwLJz41hCislhGUV8XsgPTpePbbhJ6DbbgECkTgauxxs1LkliM53oqjaHa/Z5 OE1hJrZ0SojkPXhtyb1Z1hLHrJbUZENR9uloFiJrvo0wYDo11aMky1EvXF+v17mMNN+R1YpBBp xnON19sKb9NYjau9YRTcLp0VhDPkc1DseaOaTrqevfIONlFhLKdI+GLRW+dHEIC30aoxHbAgrg n8A= X-IronPort-AV: E=Sophos;i="5.79,360,1602572400"; d="scan'208";a="106072383" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Jan 2021 01:19:37 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 20 Jan 2021 01:19:35 -0700 Received: from mchp-dev-shegelun.microchip.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 20 Jan 2021 01:19:33 -0700 From: Steen Hegelund To: Philipp Zabel , Rob Herring Subject: [PATCH v4 3/3] arm64: dts: reset: add microchip sparx5 switch reset driver Date: Wed, 20 Jan 2021 09:19:21 +0100 Message-ID: <20210120081921.3315847-4-steen.hegelund@microchip.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210120081921.3315847-1-steen.hegelund@microchip.com> References: <20210120081921.3315847-1-steen.hegelund@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210120_031936_976428_E2B12C5D X-CRM114-Status: GOOD ( 10.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Alexandre Belloni , devicetree@vger.kernel.org, Steen Hegelund , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , Gregory Clement , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This provides reset driver support for the Microchip Sparx5 PCB134 and PCB135 reference boards. Signed-off-by: Steen Hegelund --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 380281f312d8..4edbb9fcdce0 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -132,9 +132,17 @@ mux: mux-controller { }; }; - reset@611010008 { - compatible = "microchip,sparx5-chip-reset"; - reg = <0x6 0x11010008 0x4>; + gcb_ctrl: syscon@611010000 { + compatible = "microchip,sparx5-gcb-syscon", "syscon"; + reg = <0x6 0x11010000 0x10000>; + }; + + reset: reset-controller@0 { + compatible = "microchip,sparx5-switch-reset"; + reg = <0x6 0x0 0x0>; + #reset-cells = <1>; + cpu-syscon = <&cpu_ctrl>; + gcb-syscon = <&gcb_ctrl>; }; uart0: serial@600100000 {