| Message ID | 20210125122638.2947058-3-maz@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: More PMU/debug ID register fixes | expand |
Hi Marc, This matches what we do for ID_AA64DFR0_EL1: Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> On 1/25/21 12:26 PM, Marc Zyngier wrote: > We shouldn't expose *any* PMU capability when no PMU has been > configured for this VM. > > Reviewed-by: Eric Auger <eric.auger@redhat.com> > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/arm64/kvm/sys_regs.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 0c0832472c4a..ce08d28ab15c 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1048,8 +1048,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, > } else if (id == SYS_ID_DFR0_EL1) { > /* Limit guests to PMUv3 for ARMv8.1 */ > val = cpuid_feature_cap_perfmon_field(val, > - ID_DFR0_PERFMON_SHIFT, > - ID_DFR0_PERFMON_8_1); > + ID_DFR0_PERFMON_SHIFT, > + kvm_vcpu_has_pmu(vcpu) ? ID_DFR0_PERFMON_8_1 : 0); > } > > return val;
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 0c0832472c4a..ce08d28ab15c 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1048,8 +1048,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, } else if (id == SYS_ID_DFR0_EL1) { /* Limit guests to PMUv3 for ARMv8.1 */ val = cpuid_feature_cap_perfmon_field(val, - ID_DFR0_PERFMON_SHIFT, - ID_DFR0_PERFMON_8_1); + ID_DFR0_PERFMON_SHIFT, + kvm_vcpu_has_pmu(vcpu) ? ID_DFR0_PERFMON_8_1 : 0); } return val;