From patchwork Tue Jan 26 09:01:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel FERNANDEZ X-Patchwork-Id: 12045931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB522C433E0 for ; Tue, 26 Jan 2021 09:08:13 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 53479230FE for ; Tue, 26 Jan 2021 09:08:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 53479230FE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=foss.st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=njn9CCdcSQizGO3F6sVV26T2W0BvlnzY8dmK6DtIat8=; b=W+g0IxmCYvnKwpc104fIO/mQq RZVwaMuMGEM6BZwIHG65w448H6qAFokT6m94HgpSFPkQrWfM/rkfypoHcw+gbnFuHbL3U7EsL8ueK enzklmSCwaB24u8nZ/B0/ePW4CMwYTNx7lwPTgvpaSC0V5HWb6+vbR7q1FrBzKEZ6exVJCZzGqNfJ eRMvexGHBLvk5RXCxIT5S2bB0hkPMau+yK2D0DluqycF4M8yPO/qJDTgih+6Mt9wEVr8Kgx6qaAbX H/sWy20rHmPSGvohHPjhfSjk6bN4fH9kHh8K6YZhNBwnxo7gUopp4qvl1m2OI5r/30ehSw0+DOOQ6 BY2yzG1IA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4KIE-000106-VT; Tue, 26 Jan 2021 09:05:47 +0000 Received: from mx07-00178001.pphosted.com ([185.132.182.106]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4KHF-0000hb-QH for linux-arm-kernel@lists.infradead.org; Tue, 26 Jan 2021 09:04:47 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10Q8v8NR001325; Tue, 26 Jan 2021 10:04:39 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=RivJUiIy5TU2ksiPgssKrK3H7tEeukdkhC6QDU08094=; b=OHAjNCGMbpfNonAjc/soPrFb7Jb8b+O8g+A2MJpbM76pPs/Qccv7a6qyqsKI6h+tHBe1 kM7UGzFSFNorUj49R5cl5Ind6VfGvSmDSxcdzEX+TbhlwFT9TKLyBq7UIHiVn7c3AZd1 dsdzzjxekf3HLUDvs1wfkm06//acQW/8TtDWhtmZtYBZ4Xp+J6oh8OxF2wbvOL7S0aE8 W1aCFEI9WNjykmXh0AAlxtOV02/wJPRA/erYo1MYbeh/6kguMg96eYphUHY5dlpN+JMo 3V45E9kSNm+71nc+782WvRxdhkgpsXjJInQ3+h8KcPOAYzWR3Nb8mzdnqJQy54fJM40i sw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 368a56fvhh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Jan 2021 10:04:39 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 80DE510002A; Tue, 26 Jan 2021 10:04:39 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 6BCB62288C8; Tue, 26 Jan 2021 10:04:39 +0100 (CET) Received: from localhost (10.75.127.45) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 26 Jan 2021 10:04:39 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Etienne Carriere , Gabriel Fernandez , Subject: [PATCH v2 09/14] dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15 Date: Tue, 26 Jan 2021 10:01:15 +0100 Message-ID: <20210126090120.19900-10-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210126090120.19900-1-gabriel.fernandez@foss.st.com> References: <20210126090120.19900-1-gabriel.fernandez@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-26_06:2021-01-25, 2021-01-26 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210126_040446_151101_15AEDBD0 X-CRM114-Status: GOOD ( 16.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Arnaud Pouliquen , linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Gabriel Fernandez Add ID to SCMI0 to exposes reset controller for the MCU HOLD BOOT resource. Signed-off-by: Arnaud Pouliquen Signed-off-by: Gabriel Fernandez Acked-by: Rob Herring --- include/dt-bindings/reset/stm32mp1-resets.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/reset/stm32mp1-resets.h b/include/dt-bindings/reset/stm32mp1-resets.h index bc71924faa54..f3a0ed317835 100644 --- a/include/dt-bindings/reset/stm32mp1-resets.h +++ b/include/dt-bindings/reset/stm32mp1-resets.h @@ -7,6 +7,7 @@ #ifndef _DT_BINDINGS_STM32MP1_RESET_H_ #define _DT_BINDINGS_STM32MP1_RESET_H_ +#define MCU_HOLD_BOOT_R 2144 #define LTDC_R 3072 #define DSI_R 3076 #define DDRPERFM_R 3080 @@ -117,5 +118,6 @@ #define RST_SCMI0_RNG1 8 #define RST_SCMI0_MDMA 9 #define RST_SCMI0_MCU 10 +#define RST_SCMI0_MCU_HOLD_BOOT 11 #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */