From patchwork Wed Jan 27 11:32:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 12049763 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95F95C433DB for ; Wed, 27 Jan 2021 11:35:24 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3641020754 for ; Wed, 27 Jan 2021 11:35:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3641020754 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ddCBQI4wVJKfA95Flv9wSC+YFJ58JXNCfJRfxnthE9Y=; b=Qb69+92OQmNoaqLfOVqLe4don SfKRFOeiHxlt9ni1xGPjbJo0pAhx4IJMPY7Ql6iakDIYdQha6YjZ+R+l6AeNgjUbfZZKn4tCVXyVi RJmy/WRLvBS7kCGSYl7f8uT2kEJNhcMCedfFRjnjMUlwfSgaNVkc5snZQd5V3J6BcHESDaUAWfDRB qLv9CTElCSWbgwFlEqRPijyLCZrNP4CL1sVajj/LchOz3Ku5QrNH2xj1VxSNWAn1P0TMFDXKKqz5e norINEkPLAhtdFSo1ZIaYQwvxWf//irKGtIaf9ZIMAdZgkZuEsKsMASRnfiUx1QbDIFrohIOeoxkR dlk+EjjYg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4j4o-0000Q0-G7; Wed, 27 Jan 2021 11:33:34 +0000 Received: from szxga07-in.huawei.com ([45.249.212.35]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l4j4k-0000Li-0r for linux-arm-kernel@lists.infradead.org; Wed, 27 Jan 2021 11:33:31 +0000 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4DQhK73GBCz7bpB; Wed, 27 Jan 2021 19:32:11 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.498.0; Wed, 27 Jan 2021 19:33:15 +0800 From: Zhen Lei To: Will Deacon , Robin Murphy , "Mark Rutland" , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel Subject: [PATCH v3 3/3] iommu/arm-smmu-v3: Reserving the entire SMMU register space Date: Wed, 27 Jan 2021 19:32:58 +0800 Message-ID: <20210127113258.1421-4-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210127113258.1421-1-thunder.leizhen@huawei.com> References: <20210127113258.1421-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210127_063330_548345_78EFC963 X-CRM114-Status: GOOD ( 14.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , Shameer Kolothum , Zhen Lei Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org commit 52f3fab0067d ("iommu/arm-smmu-v3: Don't reserve implementation defined register space") only reserves the basic SMMU register space. So the ECMDQ register space is not covered, it should be mapped again. Due to the size of this ECMDQ resource is not fixed, depending on SMMU_IDR6.CMDQ_CONTROL_PAGE_LOG2NUMQ. Processing its resource reservation to avoid resource conflict with PMCG is a bit more complicated. Therefore, the resources of the PMCG are not reserved, and the entire SMMU resources are reserved. Suggested-by: Robin Murphy Signed-off-by: Zhen Lei --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 24 ++++-------------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 -- 2 files changed, 4 insertions(+), 22 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index f04c55a7503c790..fde24403b06a9e3 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3476,14 +3476,6 @@ static int arm_smmu_set_bus_ops(struct iommu_ops *ops) return err; } -static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start, - resource_size_t size) -{ - struct resource res = DEFINE_RES_MEM(start, size); - - return devm_ioremap_resource(dev, &res); -} - static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; @@ -3519,22 +3511,14 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } ioaddr = res->start; - /* - * Don't map the IMPLEMENTATION DEFINED regions, since they may contain - * the PMCG registers which are reserved by the PMU driver. - */ - smmu->base = arm_smmu_ioremap(dev, ioaddr, ARM_SMMU_REG_SZ); + smmu->base = devm_ioremap_resource(dev, res); if (IS_ERR(smmu->base)) return PTR_ERR(smmu->base); - if (arm_smmu_resource_size(smmu) > SZ_64K) { - smmu->page1 = arm_smmu_ioremap(dev, ioaddr + SZ_64K, - ARM_SMMU_REG_SZ); - if (IS_ERR(smmu->page1)) - return PTR_ERR(smmu->page1); - } else { + if (arm_smmu_resource_size(smmu) > SZ_64K) + smmu->page1 = smmu->base + SZ_64K; + else smmu->page1 = smmu->base; - } /* Interrupt lines */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index da525f46dab4fc1..63f2b476987d6ae 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -152,8 +152,6 @@ #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc -#define ARM_SMMU_REG_SZ 0xe00 - /* Common MSI config fields */ #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) #define MSI_CFG2_SH GENMASK(5, 4)