From patchwork Mon Feb 1 10:37:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Yi Wang X-Patchwork-Id: 12058683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9197C433DB for ; Mon, 1 Feb 2021 10:39:36 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8F41564E98 for ; Mon, 1 Feb 2021 10:39:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8F41564E98 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=7MuUTFr0jUZGCkf9h+lGXMAvN7XmLEu4WgO8QWv8Of4=; b=xrcEYNdIRCW7ZE+s4VMUVZwQQ /JVPNeDdoOTAs+hyR6Enx5VO5ofLyFhT9rwFhEF+7xqBVhkXB1aNAH+xZ4NrDTUtNvA/qSbtqolA/ RbLewVdnTncKjFiS6E0qsQ6I7McstIHCrEq3wYHpk0Hcg3hbDnufuDvQhJ6wMmnA0Xcey0hIDoXvg HUWT0/yRaGY4UbZdScC/tm3S4ZFLT6Ne87jiWiTbegIy7D6Zlb86lPEH+/PXCCf1sm3RdK7l5ILcA ln0Ao9MG5nM/4HtiRNeNAvnpNaXtfEolkYQcAplTLYJXVgxXZcJmeD4FLOvm+M6wxLhj2gVKJJJFY ZlWEYsOaQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l6WbA-00021W-8Z; Mon, 01 Feb 2021 10:38:24 +0000 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l6Wab-0001jF-VW for linux-arm-kernel@lists.infradead.org; Mon, 01 Feb 2021 10:37:52 +0000 Received: by mail-pj1-x1030.google.com with SMTP id l18so10665851pji.3 for ; Mon, 01 Feb 2021 02:37:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bmlVZxRAeFFue/kiN8+5f974mHTD70ZbhDvKpUk4Gzs=; b=f0pALAO8VmIYrpoeT3/Gzaw9jnKwBfItRcJVJK6bGkcbC0gNJCuZe/oCZGrynzA46w M52kvJWVt6V0JS2KrKMpVReScojO0m/mC2n8N5v2nmb8Ny3sKr8CfCAJrFIeD43Ko3sn /mJar9R/i/bJ/VnUpjS89f9Kkbsn4ST/FdFPw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bmlVZxRAeFFue/kiN8+5f974mHTD70ZbhDvKpUk4Gzs=; b=CaSCnhlmguVt9Ngff4H0xVuOQEaiyqCYL65ui9dW7d2MrL0bh8NKJPUprLI3Giq3Dt K6WSdHoe75A8H5I873fcyGRGRDkaGf8M9p7EprWdCZUtyhQPnCX/hg1JFBieg7J7jD/d FojAWzfUokr0oAMDBaGBYXz4cNdFuFhhhDiQXBEhNl58PBJbhAsyrjfC6JQrJBerzqmL G7Qya5uSKH46kyGyQB91vdPlfI1G3Tf9pgblUNy1keOeC8Hx9qyAOUXrZ5o30tKNRA9s pI0UrR+tyV5xlpfuMwfIj/TqzFDdHo3QoFshXjPh+i6DwHtWR+qJgpP30Sy86sozi4XG ycLg== X-Gm-Message-State: AOAM530Ngc/SQgUAhGyXijjliixbyy7HNb7y7VPOrra5VSIXtYL7Zlqp j6WnKDAV21CCJWTzjbZf6sWhmw== X-Google-Smtp-Source: ABdhPJyevrQLko0WXEGY9fNaysu7Q70Imh1x0kXORk9gQmwkyhIgPr5rgBQQ3Et8G8Cx6xxCiLsfBg== X-Received: by 2002:a17:90b:4004:: with SMTP id ie4mr3233169pjb.114.1612175867800; Mon, 01 Feb 2021 02:37:47 -0800 (PST) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:a0cd:1b84:6d56:68e1]) by smtp.gmail.com with ESMTPSA id 76sm17610356pfz.174.2021.02.01.02.37.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Feb 2021 02:37:47 -0800 (PST) From: Hsin-Yi Wang To: CK Hu , Philipp Zabel , Matthias Brugger Subject: [PATCH v5 6/8] drm/mediatek: add matrix_bits private data for ccorr Date: Mon, 1 Feb 2021 18:37:25 +0800 Message-Id: <20210201103727.376721-7-hsinyi@chromium.org> X-Mailer: git-send-email 2.30.0.365.g02bc693789-goog In-Reply-To: <20210201103727.376721-1-hsinyi@chromium.org> References: <20210201103727.376721-1-hsinyi@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210201_053750_252457_366ACAB8 X-CRM114-Status: GOOD ( 18.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Yongqiang Niu , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, Daniel Vetter , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Yongqiang Niu Add matrix_bits and coeffs_precision to ccorr private data: - matrix bits of mt8183 is 10 - matrix bits of mt8192 is 11 Signed-off-by: Yongqiang Niu Signed-off-by: Hsin-Yi Wang --- drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 34 ++++++++++++++++------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c index 6c86673a835c3..fb86f3a8b3a18 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c @@ -29,8 +29,10 @@ #define DISP_CCORR_COEF_3 0x008C #define DISP_CCORR_COEF_4 0x0090 +#define CCORR_MATRIX_BITS 10 + struct mtk_disp_ccorr_data { - u32 reserved; + u32 matrix_bits; }; /** @@ -85,21 +87,22 @@ void mtk_ccorr_stop(struct device *dev) writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN); } -/* Converts a DRM S31.32 value to the HW S1.10 format. */ -static u16 mtk_ctm_s31_32_to_s1_10(u64 in) +/* Converts a DRM S31.32 value to the HW S1.n format. */ +static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n) { u16 r; /* Sign bit. */ - r = in & BIT_ULL(63) ? BIT(11) : 0; + r = in & BIT_ULL(63) ? BIT(n + 1) : 0; if ((in & GENMASK_ULL(62, 33)) > 0) { - /* identity value 0x100000000 -> 0x400, */ + /* identity value 0x100000000 -> 0x400(mt8183), */ + /* identity value 0x100000000 -> 0x800(mt8192), */ /* if bigger this, set it to max 0x7ff. */ - r |= GENMASK(10, 0); + r |= GENMASK(n, 0); } else { - /* take the 11 most important bits. */ - r |= (in >> 22) & GENMASK(10, 0); + /* take the n+1 most important bits. */ + r |= (in >> (32 - n)) & GENMASK(n, 0); } return r; @@ -114,6 +117,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state) uint16_t coeffs[9] = { 0 }; int i; struct cmdq_pkt *cmdq_pkt = NULL; + u32 matrix_bits; if (!blob) return; @@ -121,8 +125,13 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state) ctm = (struct drm_color_ctm *)blob->data; input = ctm->matrix; + if (ccorr->data) + matrix_bits = ccorr->data->matrix_bits; + else + matrix_bits = CCORR_MATRIX_BITS; + for (i = 0; i < ARRAY_SIZE(coeffs); i++) - coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]); + coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits); mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1], &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0); @@ -199,8 +208,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev) return 0; } +static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = { + .matrix_bits = CCORR_MATRIX_BITS, +}; + static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = { - { .compatible = "mediatek,mt8183-disp-ccorr"}, + { .compatible = "mediatek,mt8183-disp-ccorr", + .data = &mt8183_ccorr_driver_data}, {}, }; MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);