| Message ID | 20210205234734.3397-3-leoyang.li@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Cleanup of LS1021a device trees | expand |
On Fri, Feb 05, 2021 at 05:47:21PM -0600, Li Yang wrote: > Layerscape SoCs doesn't use ipg as clock name. Remove the clock name > requirement in the schema. Also the original binding doesn't enforce > the order of "tx" and "rx" in dma-names. Both orders are used > extensively in existing dtses, update the schema to allow both. > > Signed-off-by: Li Yang <leoyang.li@nxp.com> > --- > Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > index f23966b0d6c6..57237b0b7d89 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml > @@ -54,20 +54,19 @@ properties: > maxItems: 1 > > clock-names: > - const: ipg > + maxItems: 1 No, for other SoCs the clock is I think required, so it should be there. Add an allof-if statements to require it on specific compatibles and skip on others. > > clock-frequency: > enum: [ 100000, 400000 ] > > dmas: > - items: > - - description: DMA controller phandle and request line for RX > - - description: DMA controller phandle and request line for TX > + minItems: 2 > + maxItems: 2 > > dma-names: > items: > - - const: rx > - - const: tx > + - enum: [ "rx", "tx" ] > + - enum: [ "tx", "rx" ] No, the order should be enforced. That was a generic recommendation from Rob. Also, I don't get the what does it mean "the original binding" in commit msg. This is the original binding. Upstream. Mainline. If your DTSes have different order, please adjust them, not the binding. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index f23966b0d6c6..57237b0b7d89 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -54,20 +54,19 @@ properties: maxItems: 1 clock-names: - const: ipg + maxItems: 1 clock-frequency: enum: [ 100000, 400000 ] dmas: - items: - - description: DMA controller phandle and request line for RX - - description: DMA controller phandle and request line for TX + minItems: 2 + maxItems: 2 dma-names: items: - - const: rx - - const: tx + - enum: [ "rx", "tx" ] + - enum: [ "tx", "rx" ] sda-gpios: maxItems: 1
Layerscape SoCs doesn't use ipg as clock name. Remove the clock name requirement in the schema. Also the original binding doesn't enforce the order of "tx" and "rx" in dma-names. Both orders are used extensively in existing dtses, update the schema to allow both. Signed-off-by: Li Yang <leoyang.li@nxp.com> --- Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)