From patchwork Fri Feb 26 14:03:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Saenz Julienne X-Patchwork-Id: 12106709 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CD40C433E0 for ; Fri, 26 Feb 2021 14:06:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3129764EF6 for ; Fri, 26 Feb 2021 14:06:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3129764EF6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=z0xaZiepHbfphvoZPVZECCmc2Oo8vj/ulMebrwCdGJc=; b=HzF649nI8dI3FdSpkz+YH4RAZ FaG44GtIuim3E+RWo0OcH8xpBn1yW0B+VnNZBs88Z5zDEPMsMjdQmp+XfBaC3nnt0XQ6R2gmUn1Tw FbTPTzolwQpb8pXSG3wi9Y3JpQoLu5kG5N6mbwIfyN2UT6xs98vToGLtM0jAZGn6Y8EH2s1td+lXx nTO7lmEQk40n5V4OSmLzFFRIFwk8jjud13V5GPK4WKxTYgOk4OyI/cV5R7IKDFYesjSSnbXEfpCNx WgxfJGfAd8YH4pT+gVEh1vp1mPUqHXvgCqtGiWWz5eZyuZ348rE/7kmL526LpdjZwlQslT/mCiG8s uevwONAFg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFdjQ-0004FV-5Q; Fri, 26 Feb 2021 14:04:36 +0000 Received: from mx2.suse.de ([195.135.220.15]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1lFdiH-0003rY-OP for linux-arm-kernel@lists.infradead.org; Fri, 26 Feb 2021 14:03:34 +0000 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id D637FB077; Fri, 26 Feb 2021 14:03:21 +0000 (UTC) From: Nicolas Saenz Julienne To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 09/13] iommu/arm-smmu: Make use of dev_64bit_mmio_supported() Date: Fri, 26 Feb 2021 15:03:01 +0100 Message-Id: <20210226140305.26356-10-nsaenzjulienne@suse.de> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210226140305.26356-1-nsaenzjulienne@suse.de> References: <20210226140305.26356-1-nsaenzjulienne@suse.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210226_090326_017723_AD428D20 X-CRM114-Status: GOOD ( 16.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: f.fainelli@gmail.com, arnd@arndb.de, narmstrong@baylibre.com, dwmw2@infradead.org, linux@armlinux.org.uk, hch@infradead.org, will@kernel.org, robh+dt@kernel.org, catalin.marinas@arm.com, robin.murphy@arm.com, ardb@kernel.org, Nicolas Saenz Julienne Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some arm SMMU implementations might sit on a bus that doesn't support 64bit memory accesses. In that case default to using hi_lo_{readq, writeq}() and BUG if such platform tries to use AArch64 formats as they rely on writeq()'s atomicity. Signed-off-by: Nicolas Saenz Julienne --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++++ drivers/iommu/arm/arm-smmu/arm-smmu.h | 9 +++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index d8c6bfde6a61..239ff42b20c3 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1889,6 +1889,15 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K; } + /* + * 64bit accesses not possible through the interconnect, AArch64 + * formats depend on it. + */ + BUG_ON(!dev_64bit_mmio_supported(smmu->dev) && + smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_4K | + ARM_SMMU_FEAT_FMT_AARCH64_16K | + ARM_SMMU_FEAT_FMT_AARCH64_64K)); + if (smmu->impl && smmu->impl->cfg_probe) { ret = smmu->impl->cfg_probe(smmu); if (ret) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h index d2a2d1bc58ba..997d13a21717 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.h +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h @@ -477,15 +477,20 @@ static inline void arm_smmu_writel(struct arm_smmu_device *smmu, int page, { if (smmu->impl && unlikely(smmu->impl->write_reg)) smmu->impl->write_reg(smmu, page, offset, val); - else + else if (dev_64bit_mmio_supported(smmu->dev)) writel_relaxed(val, arm_smmu_page(smmu, page) + offset); + else + hi_lo_writeq_relaxed(val, arm_smmu_page(smmu, page) + offset); } static inline u64 arm_smmu_readq(struct arm_smmu_device *smmu, int page, int offset) { if (smmu->impl && unlikely(smmu->impl->read_reg64)) return smmu->impl->read_reg64(smmu, page, offset); - return readq_relaxed(arm_smmu_page(smmu, page) + offset); + else if (dev_64bit_mmio_supported(smmu->dev)) + return readq_relaxed(arm_smmu_page(smmu, page) + offset); + else + return hi_lo_readq_relaxed(arm_smmu_page(smmu, page) + offset); } static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page,