| Message ID | 20210308182339.379775-4-krzysztof.kozlowski@canonical.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: socfpga: minor cleanups and compile testing | expand |
On 08/03/2021 19:23, Krzysztof Kozlowski wrote: > The Stratix 10 / Agilex / N5X clocks do not use anything other than OF > or COMMON_CLK so they should be compile testable on most of the > platforms. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > drivers/clk/Makefile | 5 +---- > drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ > 2 files changed, 17 insertions(+), 10 deletions(-) > > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index 12e46b12e587..9b582b3fca34 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -104,10 +104,7 @@ obj-y += renesas/ > obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ > obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ > obj-$(CONFIG_CLK_SIFIVE) += sifive/ > -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ > -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ > -obj-$(CONFIG_ARCH_N5X) += socfpga/ > -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ > +obj-y += socfpga/ > obj-$(CONFIG_PLAT_SPEAR) += spear/ > obj-y += sprd/ > obj-$(CONFIG_ARCH_STI) += st/ > diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig > index 4922cc35f4cc..de7b3137e215 100644 > --- a/drivers/clk/socfpga/Kconfig > +++ b/drivers/clk/socfpga/Kconfig > @@ -1,13 +1,23 @@ > # SPDX-License-Identifier: GPL-2.0 > +config COMMON_CLK_SOCFPGA > + bool "Intel SoCFPGA family clock support" if COMPILE_TEST Kernel test robot found here wrong configuration - possibility to disable the clocks with compile test. I'll send a v2. Best regards, Krzysztof
On 09/03/2021 09:49, Krzysztof Kozlowski wrote: > On 08/03/2021 19:23, Krzysztof Kozlowski wrote: >> The Stratix 10 / Agilex / N5X clocks do not use anything other >> than OF or COMMON_CLK so they should be compile testable on most of >> the platforms. >> >> Signed-off-by: Krzysztof Kozlowski >> <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5 >> +---- drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ 2 >> files changed, 17 insertions(+), 10 deletions(-) >> >> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index >> 12e46b12e587..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ >> b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ >> obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ >> obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ >> obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += >> socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ >> -obj-$(CONFIG_ARCH_N5X) += socfpga/ >> -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-y += socfpga/ >> obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ >> obj-$(CONFIG_ARCH_STI) += st/ diff --git >> a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index >> 4922cc35f4cc..de7b3137e215 100644 --- a/drivers/clk/socfpga/Kconfig >> +++ b/drivers/clk/socfpga/Kconfig @@ -1,13 +1,23 @@ # >> SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool >> "Intel SoCFPGA family clock support" if COMPILE_TEST > > Kernel test robot found here wrong configuration - possibility to > disable the clocks with compile test. I'll send a v2. Uh, that's not that easy. Intel created three different arm64 architectures for one real arm64 architecture... I guess it was driven by the marketing but here we are - the solution would be to have entries like: bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_SOCFPGA && !ARCH_STRATIX10 ... bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_STRATIX10 ... bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X ... I think it looks wrong. The stratix/agilex/n5x are basically flavors of socfpga from Linux point of view. This is the same architecture for Linux kernel, from high level point of view. Instead of going with unified ARCH_SOCFPGA (like all other platforms, e.g. Renesas, NXP), the Intel create three different kernel-wide arm64 ARCH_xxx symbols. It's too much. How about converting all these arm64 Intel platforms to ARCH_SOCFPGA? Best regards, Krzysztof
On Tue, Mar 9, 2021 at 10:02 AM Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > > > > Kernel test robot found here wrong configuration - possibility to > > disable the clocks with compile test. I'll send a v2. > > Uh, that's not that easy. Intel created three different arm64 architectures > for one real arm64 architecture... I guess it was driven by > the marketing but here we are - the solution would be to have entries like: > > bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_SOCFPGA && !ARCH_STRATIX10 > ... > bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X && !ARCH_STRATIX10 > ... > bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST && !ARCH_AGILEX && !ARCH_N5X > ... > > I think it looks wrong. The stratix/agilex/n5x are basically flavors of > socfpga from Linux point of view. This is the same architecture for Linux > kernel, from high level point of view. Instead of going with unified ARCH_SOCFPGA > (like all other platforms, e.g. Renesas, NXP), the Intel create three > different kernel-wide arm64 ARCH_xxx symbols. > > It's too much. How about converting all these arm64 Intel platforms to ARCH_SOCFPGA? Agreed, that seems best here. There is no need at all to have multiple top-level Kconfig symbols when these are all part of one SoC family. Arnd
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 4922cc35f4cc..de7b3137e215 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,13 +1,23 @@ # SPDX-License-Identifier: GPL-2.0 +config COMMON_CLK_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST + depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST + default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if COMMON_CLK_SOCFPGA + config COMMON_CLK_STRATIX10 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 || COMPILE_TEST config COMMON_CLK_AGILEX - bool - # Intel Agilex / N5X clock controller support + bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST default y if ARCH_AGILEX || ARCH_N5X - depends on ARCH_AGILEX || ARCH_N5X + depends on ARCH_AGILEX || ARCH_N5X || COMPILE_TEST select COMMON_CLK_STRATIX10 + +endif # COMMON_CLK_SOCFPGA
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Makefile | 5 +---- drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 10 deletions(-)