| Message ID | 20210310152006.15018-1-nicolas.ferre@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet | expand |
On 3/10/21 5:20 PM, nicolas.ferre@microchip.com wrote: > From: Nicolas Ferre <nicolas.ferre@microchip.com> > > Fix the whole mux-mask table according to datasheet for the sam9x60 > product. Too much functions for pins were disabled leading to > misunderstandings when enabling more peripherals or taking this table > as an example for another board. > Take advantage of this fix to move the mux-mask in the SoC file where it > belongs and use lower case letters for hex numbers like everywhere in > the file. > > Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> > Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") > Cc: <stable@vger.kernel.org> # 5.6+ > Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> I went through all the pins described in DS60001579D, and I obtained the same mux-mask values: Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> > --- > v1 -> v2: > - move to SoC dtsi file: it applies to all boards using the sam9x60 SoC version > - use lower case for hex numbers instead of mixed nonsense > > arch/arm/boot/dts/at91-sam9x60ek.dts | 8 -------- > arch/arm/boot/dts/sam9x60.dtsi | 9 +++++++++ > 2 files changed, 9 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts > index 4c40ae571154..775ceb3acb6c 100644 > --- a/arch/arm/boot/dts/at91-sam9x60ek.dts > +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts > @@ -334,14 +334,6 @@ ethernet-phy@0 { > }; > > &pinctrl { > - atmel,mux-mask = < > - /* A B C */ > - 0xFFFFFEFF 0xC0E039FF 0xEF00019D /* pioA */ > - 0x03FFFFFF 0x02FC7E68 0x00780000 /* pioB */ > - 0xffffffff 0xF83FFFFF 0xB800F3FC /* pioC */ > - 0x003FFFFF 0x003F8000 0x00000000 /* pioD */ > - >; > - > adc { > pinctrl_adc_default: adc_default { > atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; > diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi > index 84066c1298df..ec45ced3cde6 100644 > --- a/arch/arm/boot/dts/sam9x60.dtsi > +++ b/arch/arm/boot/dts/sam9x60.dtsi > @@ -606,6 +606,15 @@ pinctrl: pinctrl@fffff400 { > compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; > ranges = <0xfffff400 0xfffff400 0x800>; > > + /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */ > + atmel,mux-mask = < > + /* A B C */ > + 0xffffffff 0xffe03fff 0xef00019d /* pioA */ > + 0x03ffffff 0x02fc7e7f 0x00780000 /* pioB */ > + 0xffffffff 0xffffffff 0xf83fffff /* pioC */ > + 0x003fffff 0x003f8000 0x00000000 /* pioD */ > + >; > + > pioA: gpio@fffff400 { > compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; > reg = <0xfffff400 0x200>; >
diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 4c40ae571154..775ceb3acb6c 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -334,14 +334,6 @@ ethernet-phy@0 { }; &pinctrl { - atmel,mux-mask = < - /* A B C */ - 0xFFFFFEFF 0xC0E039FF 0xEF00019D /* pioA */ - 0x03FFFFFF 0x02FC7E68 0x00780000 /* pioB */ - 0xffffffff 0xF83FFFFF 0xB800F3FC /* pioC */ - 0x003FFFFF 0x003F8000 0x00000000 /* pioD */ - >; - adc { pinctrl_adc_default: adc_default { atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi index 84066c1298df..ec45ced3cde6 100644 --- a/arch/arm/boot/dts/sam9x60.dtsi +++ b/arch/arm/boot/dts/sam9x60.dtsi @@ -606,6 +606,15 @@ pinctrl: pinctrl@fffff400 { compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; ranges = <0xfffff400 0xfffff400 0x800>; + /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */ + atmel,mux-mask = < + /* A B C */ + 0xffffffff 0xffe03fff 0xef00019d /* pioA */ + 0x03ffffff 0x02fc7e7f 0x00780000 /* pioB */ + 0xffffffff 0xffffffff 0xf83fffff /* pioC */ + 0x003fffff 0x003f8000 0x00000000 /* pioD */ + >; + pioA: gpio@fffff400 { compatible = "microchip,sam9x60-gpio", "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>;