From patchwork Wed Mar 24 08:19:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= X-Patchwork-Id: 12160491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 09CE4C433DB for ; Wed, 24 Mar 2021 08:24:41 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 161ED619B6 for ; Wed, 24 Mar 2021 08:24:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 161ED619B6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Cc:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Tg10Nm2S/DXHUi0RI79RWg03tJU6xfSOrTh+Mghtj/k=; b=ZbC3a3fIyzht67dMHvMWb0gpF fIqrzuF7BVUMYB3khESfnXeGoS9BfBKAHvi/sTedq3kLbrbd0tkUJWAQ6pSTrwpBR4g95tNx/GWj9 nU2t5J/vbGyb7S9cQ/woMWSVkpSMGRP5MdRzmHOVieshAQA/ww/NSCLghzYL7uTzoTRiU1JMyKC9b WDIyM9Nptd5Px/nuiAAQkVC6e7/kBb1jLlFv7kUzc/O8G9iePmr5ATf5aPTvYFlcJQrazQzYKabtV 4auPsGQPWR9k+QNSsQd4xHRXu+Ewjrwp14yDDrv3cRa91bibgPInO6uTpYsZjWz6Hexw7mz3bLIfX gF6GTeNdQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lOymq-00GZyq-Pu; Wed, 24 Mar 2021 08:22:45 +0000 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lOyjv-00GYtt-E3 for linux-arm-kernel@lists.infradead.org; Wed, 24 Mar 2021 08:19:46 +0000 Received: by mail-wr1-x42f.google.com with SMTP id c8so10564527wrq.11 for ; Wed, 24 Mar 2021 01:19:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=JmSHiD9M81xEDd6VjmJAtdYKosJxOC7lOQTLZmyj4iU=; b=LTnwldcka4s3v5J64n63VWKMPcDLBKcv3N4TFcEyMz2Q0RojsU9B+ilZ2rEgVE1BVo 9H+rVlb28XZF2Oi6/yWraKyuPV+kbmEflnuI5CnSqSWfMsmKsj0ox1XORc2B9FguYmmy GJ14pQC5suQ9g5WZH6aZE6lsb8HpNjM2aCCp+a+zEIdke1HblgRq/iCzUOh+sBez8RuF Jk9bhZbgBSxdiR8fz5eVzFIOZcpxUSMRNwQaC65bBQXkT0LpVeVebABT3EzeZf+PV/UR oOLo0qT/b3JGI51ezX9AJndrHNfhfDJeCmXkB40Mxc3z1uSDZ3muFqtNOSZs2Te4OA6E L3Xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JmSHiD9M81xEDd6VjmJAtdYKosJxOC7lOQTLZmyj4iU=; b=Qped4vupbFhVZGKTR8Kme5TxpACnQb3bg0zQtiBapZuRcX4YE0XAoLERWwP76VlFCb aArNO9DkqiZBk1c05xAA1v4VMIO1sYln07a1Gb0k4Ju+cfQWOXHFmogXWVeuxNUZIrZ9 gTVFTj24QfHK+thpD0Mwa9GESwocm8wW8FrnaiciacgwXemG72zd/86n3vmp0/qoAypm hY5R9DSDQndzmleV+JiGji00bjbkCXkj1Y7fH67Z+eBed95wzrWpgV1S6sI1Wo2w/gPN wHxOInvvKfb5jH7JQOcXQ6QBbFLK2yfh5/Hc/WLFpOX9Nj/1GfSXWog3BqVHI73nRLbu 9FbQ== X-Gm-Message-State: AOAM530/ooCkOhu4Fqv44GBVUolRYDGdNQXdvIH7bFzQ989rSuOAQ1Ss HF2ZvsGjeDKzhYSPjmXF5N0= X-Google-Smtp-Source: ABdhPJzj6R6MNfWSC7554lODfzHhmD2L3SSxfG5kCDwA02FmgfZY+nQusmc6Fv7CF3Y4H7Gg2GZWTQ== X-Received: by 2002:a5d:6152:: with SMTP id y18mr2108270wrt.255.1616573983027; Wed, 24 Mar 2021 01:19:43 -0700 (PDT) Received: from skynet.lan (51.red-83-44-13.dynamicip.rima-tde.net. [83.44.13.51]) by smtp.gmail.com with ESMTPSA id x25sm1498578wmj.14.2021.03.24.01.19.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 01:19:42 -0700 (PDT) From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Lee Jones , Michael Walle , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Jonas Gorski , =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= , Necip Fazil Yildiran , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v9 17/22] dt-bindings: add BCM63268 pincontroller binding documentation Date: Wed, 24 Mar 2021 09:19:18 +0100 Message-Id: <20210324081923.20379-18-noltari@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210324081923.20379-1-noltari@gmail.com> References: <20210324081923.20379-1-noltari@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210324_081943_534733_D4950391 X-CRM114-Status: GOOD ( 14.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add binding documentation for the pincontrol core found in the BCM63268 family SoCs. Co-developed-by: Jonas Gorski Signed-off-by: Jonas Gorski Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Rob Herring --- v9: drop function and pins references and fix Co-developed-by v8: add changes suggested by Rob Herring v7: add changes suggested by Rob Herring v6: add changes suggested by Rob Herring v5: change Documentation to dt-bindings in commit title v4: no changes v3: add new gpio node v2: remove interrupts .../pinctrl/brcm,bcm63268-pinctrl.yaml | 164 ++++++++++++++++++ 1 file changed, 164 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml new file mode 100644 index 000000000000..58ffed44b3c4 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml @@ -0,0 +1,164 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM63268 pin controller + +maintainers: + - Álvaro Fernández Rojas + - Jonas Gorski + +description: + Bindings for Broadcom's BCM63268 memory-mapped pin controller. + +properties: + compatible: + const: brcm,bcm63268-pinctrl + + reg: + maxItems: 3 + +patternProperties: + '-pins$': + type: object + $ref: pinmux-node.yaml# + + properties: + function: + enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5, + hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi, + vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data, + nand, gpio35_alt, dectpd, vdsl_phy_override_0, + vdsl_phy_override_1, vdsl_phy_override_2, + vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ] + + pins: + enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19, + gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35 + dectpd_grp, vdsl_phy_override_0_grp, + vdsl_phy_override_1_grp, vdsl_phy_override_2_grp, + vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@10 { + compatible = "brcm,bcm63268-pinctrl"; + reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; + + pinctrl_serial_led: serial_led-pins { + pinctrl_serial_led_clk: serial_led_clk-pins { + function = "serial_led_clk"; + pins = "gpio0"; + }; + + pinctrl_serial_led_data: serial_led_data-pins { + function = "serial_led_data"; + pins = "gpio1"; + }; + }; + + pinctrl_hsspi_cs4: hsspi_cs4-pins { + function = "hsspi_cs4"; + pins = "gpio16"; + }; + + pinctrl_hsspi_cs5: hsspi_cs5-pins { + function = "hsspi_cs5"; + pins = "gpio17"; + }; + + pinctrl_hsspi_cs6: hsspi_cs6-pins { + function = "hsspi_cs6"; + pins = "gpio8"; + }; + + pinctrl_hsspi_cs7: hsspi_cs7-pins { + function = "hsspi_cs7"; + pins = "gpio9"; + }; + + pinctrl_adsl_spi: adsl_spi-pins { + pinctrl_adsl_spi_miso: adsl_spi_miso-pins { + function = "adsl_spi_miso"; + pins = "gpio18"; + }; + + pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { + function = "adsl_spi_mosi"; + pins = "gpio19"; + }; + }; + + pinctrl_vreq_clk: vreq_clk-pins { + function = "vreq_clk"; + pins = "gpio22"; + }; + + pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { + function = "pcie_clkreq_b"; + pins = "gpio23"; + }; + + pinctrl_robosw_led_clk: robosw_led_clk-pins { + function = "robosw_led_clk"; + pins = "gpio30"; + }; + + pinctrl_robosw_led_data: robosw_led_data-pins { + function = "robosw_led_data"; + pins = "gpio31"; + }; + + pinctrl_nand: nand-pins { + function = "nand"; + group = "nand_grp"; + }; + + pinctrl_gpio35_alt: gpio35_alt-pins { + function = "gpio35_alt"; + pin = "gpio35"; + }; + + pinctrl_dectpd: dectpd-pins { + function = "dectpd"; + group = "dectpd_grp"; + }; + + pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { + function = "vdsl_phy_override_0"; + group = "vdsl_phy_override_0_grp"; + }; + + pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { + function = "vdsl_phy_override_1"; + group = "vdsl_phy_override_1_grp"; + }; + + pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { + function = "vdsl_phy_override_2"; + group = "vdsl_phy_override_2_grp"; + }; + + pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { + function = "vdsl_phy_override_3"; + group = "vdsl_phy_override_3_grp"; + }; + + pinctrl_dsl_gpio8: dsl_gpio8-pins { + function = "dsl_gpio8"; + group = "dsl_gpio8"; + }; + + pinctrl_dsl_gpio9: dsl_gpio9-pins { + function = "dsl_gpio9"; + group = "dsl_gpio9"; + }; + };