From patchwork Wed Mar 24 08:19:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= X-Patchwork-Id: 12160465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE8BCC433DB for ; Wed, 24 Mar 2021 08:21:55 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 33CE9619E5 for ; Wed, 24 Mar 2021 08:21:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 33CE9619E5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Cc:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=R14faFEUU5MDLsLiVuGRnaiiUq6ZF7s+M8pIbt64eiU=; b=B8Rv22ro7Rl966HTQxOwYoP8v 2MAINDvj6sAu2FK5JnEMik+xZI++cKe9U6z4fNZIX657eBbNWR4Af6/HWlc2eUpDGApzl7hZCkwwP Sny3u3enTZ9t3cTTUeaacHHwDUtAcpRc2ovTfe3Di3MJMsb5zD8RltH0Nk+TeBKr2Qaw1GUa/mSJU 7RcTTCnYhn8YYmyegb3CS985CPChCzVkVF77iPOOgk0+KXX1x6GIcieQ8o9CUvXNhCBHz0r7F+VHm dvDIRaa1lWw5acneTYm+MpcO5Lv7GPtRbzb38p9Cw7XluA0vCR9Tl5zeT449q2TO7w7OmjW8itdNE ZXyW+yvaA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lOykF-00GYyp-IM; Wed, 24 Mar 2021 08:20:03 +0000 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lOyjh-00GYoa-58 for linux-arm-kernel@lists.infradead.org; Wed, 24 Mar 2021 08:19:32 +0000 Received: by mail-wm1-x32b.google.com with SMTP id u5-20020a7bcb050000b029010e9316b9d5so658139wmj.2 for ; Wed, 24 Mar 2021 01:19:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=C6DZyFkEKD7mxvfH/OtGjYQQtJBwqDsEyOszGZxsrNc=; b=HsO+vK//M/ioy7BNmK17H9rINuRjNJFyKJMINlxMhptl7fH1Yu9RyyOx+vdax40ajC 0FU8nFXAJNBK1Mb+y6Brbwb1Y4kMDRHzmSRo3fKOZvHL6TA/7bI8XeqA9zmJELyPYxgE TGC9+eI5c0rwZja3Nswtk+Z+0VtVXugiWatJe9vk9rSI/Eh9QvJ+HGNJkqhRThGhlnxa GjGzaiMpOkcmedzuq/MO0MhDpgi+Zd5iVo1oKr9u4IhGjeYnhK494mopBnDqihMFylcs SR28rwd7n3dAcokkC2W0H752xOv9bbI6s7p7mvlymGyWWyMNim06uOKjtCtlkvXfDNKs LDbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C6DZyFkEKD7mxvfH/OtGjYQQtJBwqDsEyOszGZxsrNc=; b=VBu77OAYKl+rdkM8bjdMSWnqYGuIV/o4RxsDPYPwaOxAyyanVrrWlx4DEMbpgbUlQV 5CHw4jMxt1HBON7qCpQwWS2fJ+CUG6a6EaGM0wPG5gB8V7UuiHrJlbelj0yUfWn+iU2Q YufG32ywoLsGJA674Q+Qp+LlJAdnB+AU1XDembn37FjRbwXIzQo4XHZjtXjGlYx/qRsD 16pJZdPURxfC1SZih4yqB5jywFaxW6s1khs1uoXx13rC+xDzWCurPqnM1RlBJ/CWSAAx etZbtQAve+CCLQnZG79yl0fukUoql8SIxfPyYBHKV9n1tTy0vc/IfIXyEorIX01ILwV5 9whw== X-Gm-Message-State: AOAM530Q9+71EsxTIh0KLtcMjiSH0eGbpN6zTuR4kor0bFE8QXJAjuQq kSmT9J6FteU7uHq8Js7MYAo= X-Google-Smtp-Source: ABdhPJyCLx6j9CYgw7D1Fn0gD10/IcNz23M56Mmdy8jvTpkZ3jXY1TnDySqhPNQLIXtNCBDCM4pjgA== X-Received: by 2002:a7b:cbc4:: with SMTP id n4mr1751508wmi.153.1616573968516; Wed, 24 Mar 2021 01:19:28 -0700 (PDT) Received: from skynet.lan (51.red-83-44-13.dynamicip.rima-tde.net. [83.44.13.51]) by smtp.gmail.com with ESMTPSA id x25sm1498578wmj.14.2021.03.24.01.19.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Mar 2021 01:19:28 -0700 (PDT) From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Lee Jones , Michael Walle , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, Jonas Gorski , =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= , Necip Fazil Yildiran , Andy Shevchenko , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v9 03/22] dt-bindings: improve BCM6345 GPIO binding documentation Date: Wed, 24 Mar 2021 09:19:04 +0100 Message-Id: <20210324081923.20379-4-noltari@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210324081923.20379-1-noltari@gmail.com> References: <20210324081923.20379-1-noltari@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210324_081930_106947_F3E48E25 X-CRM114-Status: GOOD ( 19.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert existing BCM6345 GPIO binding documentation to YAML and add binding documentation for the GPIO controller found in BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 SoCs. Co-developed-by: Jonas Gorski Signed-off-by: Jonas Gorski Signed-off-by: Álvaro Fernández Rojas Reviewed-by: Rob Herring --- v9: document 32-bit registers and replace gpio-controller with gpio. v8: introduce changes suggested by Rob Herring v7: new patch, splitted from pinctrl documentation .../bindings/gpio/brcm,bcm6345-gpio.txt | 46 ---------- .../bindings/gpio/brcm,bcm6345-gpio.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 46 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt create mode 100644 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt deleted file mode 100644 index e7853143fa42..000000000000 --- a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.txt +++ /dev/null @@ -1,46 +0,0 @@ -Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. - -These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 -are the only ones which don't need a pinctrl driver. -BCM6338 have 8-bit data and dirout registers, where GPIO state can be read -and/or written, and the direction changed from input to output. -BCM6345 have 16-bit data and dirout registers, where GPIO state can be read -and/or written, and the direction changed from input to output. - -Required properties: - - compatible: should be "brcm,bcm6345-gpio" - - reg-names: must contain - "dat" - data register - "dirout" - direction (output) register - - reg: address + size pairs describing the GPIO register sets; - order must correspond with the order of entries in reg-names - - #gpio-cells: must be set to 2. The first cell is the pin number and - the second cell is used to specify the gpio polarity: - 0 = active high - 1 = active low - - gpio-controller: Marks the device node as a gpio controller. - -Optional properties: - - native-endian: use native endian memory. - -Examples: - - BCM6338: - gpio: gpio-controller@fffe0407 { - compatible = "brcm,bcm6345-gpio"; - reg-names = "dirout", "dat"; - reg = <0xfffe0407 1>, <0xfffe040f 1>; - - #gpio-cells = <2>; - gpio-controller; - }; - - - BCM6345: - gpio: gpio-controller@fffe0406 { - compatible = "brcm,bcm6345-gpio"; - reg-names = "dirout", "dat"; - reg = <0xfffe0406 2>, <0xfffe040a 2>; - native-endian; - - #gpio-cells = <2>; - gpio-controller; - }; diff --git a/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml new file mode 100644 index 000000000000..4d69f79df859 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM6345 GPIO controller + +maintainers: + - Álvaro Fernández Rojas + - Jonas Gorski + +description: |+ + Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers. + + These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 + are the only ones which don't need a pinctrl driver. + + BCM6338 have 8-bit data and dirout registers, where GPIO state can be read + and/or written, and the direction changed from input to output. + BCM6345 have 16-bit data and dirout registers, where GPIO state can be read + and/or written, and the direction changed from input to output. + BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data + and dirout registers, where GPIO state can be read and/or written, and the + direction changed from input to output. + +properties: + compatible: + enum: + - brcm,bcm6318-gpio + - brcm,bcm6328-gpio + - brcm,bcm6345-gpio + - brcm,bcm6358-gpio + - brcm,bcm6362-gpio + - brcm,bcm6368-gpio + - brcm,bcm63268-gpio + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: + maxItems: 1 + + native-endian: true + + reg: + maxItems: 2 + + reg-names: + items: + - const: dirout + - const: dat + +required: + - compatible + - reg + - reg-names + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + gpio@fffe0406 { + compatible = "brcm,bcm6345-gpio"; + reg-names = "dirout", "dat"; + reg = <0xfffe0406 2>, <0xfffe040a 2>; + native-endian; + + gpio-controller; + #gpio-cells = <2>; + }; + + - | + gpio@0 { + compatible = "brcm,bcm63268-gpio"; + reg-names = "dirout", "dat"; + reg = <0x0 0x8>, <0x8 0x8>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 52>; + #gpio-cells = <2>; + };