From patchwork Mon Mar 29 01:59:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brad Larson X-Patchwork-Id: 12171007 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CE78C433DB for ; Mon, 29 Mar 2021 21:45:15 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9961F61989 for ; Mon, 29 Mar 2021 21:45:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9961F61989 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pensando.io Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:MIME-Version:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:Cc:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bWSo+7yWRvyVuoua4aBf0zeq2AeokbmzqCrgO3Vb8Ec=; b=HIMsj/gPTEoxl6Zj2kUe+sHzov bX5C09A+8wopgs57d9MHaCV/zEXKCBHZW3g4RGS9ep0im+MQ5HTe6OBchK1JVTWr0RwryapFpRgM8 VUWNEuNuuiQRYcE0TJbTXPoIqbXFRWEB+/f28Knk62AlrAheRvqmj2f70gxvdz7ypPajaD4FyLYxg ynVce7DRnRP+iYO90DIMf1CSHXszWmclyt3qJVftZ9ecZi0eJE3h6YUDI5QLXAWhBetnBmgaWercL NFcY5UyA7fcZ4VkmvWU0yeUPf+1rZW/7ueGvuJL5uwmAgk7FqYkbRRUQRanm58l5qLW7jE7sdGdAQ oEgjhLyw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lQze3-001WCt-52; Mon, 29 Mar 2021 21:42:00 +0000 Received: from mail-oi1-x22e.google.com ([2607:f8b0:4864:20::22e]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lQpAR-000aBY-Il for linux-arm-kernel@lists.infradead.org; Mon, 29 Mar 2021 10:30:45 +0000 Received: by mail-oi1-x22e.google.com with SMTP id w70so12690356oie.0 for ; Mon, 29 Mar 2021 03:30:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b/jZDT68x0JaSsnv/hQubN3XpQ9Z0D2o2MVObC/l6Fo=; b=sS489wwLelB1CB5dqgyh7wsTUSVBUtBg0ud34L7zg1rSE4zuKq9rsTChXF0WjHfgYx xnSOv2X282S8mYn7IZJg/6eYIGVZ9dubYVudpHyA+ZaL7YwJxZK2Ny03oqS5OBawLxpS PiQeu1Dok3KDzEklhvtEC24G39YDFa+JPFHUfbXOwn7nK0CHREyzEbRdb+HQtLSyhl2J rgeF2/ez0smsld+3IwHP7eNDeR2DspbavesDBIuSo/oNVx9zRy2MmwYIHoXGUMShcL7X 6U5NzbaKiStC3MqBZsTDf7Di3QMpfI5dEZ7w5tCF2sBPHqNF+L7A4HUUtMpqIbJBpv1g t/XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b/jZDT68x0JaSsnv/hQubN3XpQ9Z0D2o2MVObC/l6Fo=; b=rm6zhinIohBugMJUpoaNGbdtQu/5FucxqWQb1Ltb7AicIMPdq32mJ1iEgGS5wmDtf2 cBzOZW42yw+t2ZJn6rirL3K049z+agIR3Oz/LolJiaurZAn68aYWWVtPNPHwzg/Lqxl0 g4D6Yyykuy8Lw6EZqCjVjE6QfvUNt1Y42HxRoM7T2JJqL/Km/BUz7zAfFVZUbusRX35l bw1yRM3DqbOxaeOZzpfmPw5QdYnnkAQT8ndoSkWxCw5tkFzAeQxw5ncwM99nBN65vDhN 6JY7z6YOfYuzmCuJd+7DYmZiVXenH5EVuwti884ZYPRoZ1CU0gHc7O5f8aTLfia49RsJ uXgg== X-Gm-Message-State: AOAM5332aGrv5mTpT36xxJSMuUyd5uEwWy5b7ya/1+O4q25n4kJ7hlUt Lx8ocPX/AAuR+YIeEv17PwTT7JZxCxAqAA== X-Google-Smtp-Source: ABdhPJwubq6Oxfs4yJpfSu8/guxn7Yx4XZkdvtnthlj4J2ZbKpHjTyY4E6/naVDgid3eo73k2k/ZTw== X-Received: by 2002:a17:90b:514:: with SMTP id r20mr24421108pjz.145.1616983189818; Sun, 28 Mar 2021 18:59:49 -0700 (PDT) Received: from platform-dev1.pensando.io ([12.226.153.42]) by smtp.gmail.com with ESMTPSA id w37sm14728027pgl.13.2021.03.28.18.59.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Mar 2021 18:59:49 -0700 (PDT) From: Brad Larson To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, linus.walleij@linaro.org, bgolaszewski@baylibre.com, broonie@kernel.org, fancer.lancer@gmail.com, adrian.hunter@intel.com, ulf.hansson@linaro.org, olof@lixom.net, brad@pensando.io, linux-gpio@vger.kernel.org, linux-spi@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/13] spi: dw: Add support for Pensando Elba SoC SPI Date: Sun, 28 Mar 2021 18:59:28 -0700 Message-Id: <20210329015938.20316-4-brad@pensando.io> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210329015938.20316-1-brad@pensando.io> References: <20210329015938.20316-1-brad@pensando.io> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210329_113043_802717_C7F0DF5C X-CRM114-Status: GOOD ( 18.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Pensando Elba SoC uses a GPIO based chip select for two DW SPI busses with each bus having two chip selects. Signed-off-by: Brad Larson --- drivers/spi/spi-dw-mmio.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index 17c06039a74d..c323a5ceecb8 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -56,7 +56,7 @@ struct dw_spi_mscc { /* * The Designware SPI controller (referred to as master in the documentation) * automatically deasserts chip select when the tx fifo is empty. The chip - * selects then needs to be either driven as GPIOs or, for the first 4 using the + * selects then needs to be either driven as GPIOs or, for the first 4 using * the SPI boot controller registers. the final chip select is an OR gate * between the Designware SPI controller and the SPI boot controller. */ @@ -237,6 +237,31 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, return 0; } +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable) +{ + struct dw_spi *dws = spi_master_get_devdata(spi->master); + + if (!enable) { + /* + * Using a GPIO-based chip-select, the DW SPI + * controller still needs its own CS bit selected + * to start the serial engine. On Elba the specific + * CS doesn't matter to start the serial engine, + * so using CS0. + */ + dw_writel(dws, DW_SPI_SER, BIT(0)); + } else { + dw_writel(dws, DW_SPI_SER, 0); + } +} + +static int dw_spi_elba_init(struct platform_device *pdev, + struct dw_spi_mmio *dwsmmio) +{ + dwsmmio->dws.set_cs = dw_spi_elba_set_cs; + return 0; +} + static int dw_spi_mmio_probe(struct platform_device *pdev) { int (*init_func)(struct platform_device *pdev, @@ -351,6 +376,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { { .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init}, { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init}, { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init}, + { .compatible = "pensando,elba-spi", .data = dw_spi_elba_init}, { /* end of table */} }; MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);