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d="scan'208";a="116804449" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Apr 2021 04:03:44 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 13 Apr 2021 04:03:44 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Tue, 13 Apr 2021 04:03:32 -0700 From: Eugen Hristev To: , , , CC: , , Eugen Hristev Subject: [PATCH v3 25/33] media: atmel: atmel-isc: create an adapt pipeline callback for product specific Date: Tue, 13 Apr 2021 13:57:23 +0300 Message-ID: <20210413105731.610028-26-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210413105731.610028-1-eugen.hristev@microchip.com> References: <20210413105731.610028-1-eugen.hristev@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210413_040345_339502_3BE04833 X-CRM114-Status: GOOD ( 14.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Once the pipeline is set in the base code, create a callback that will adapt the ISC pipeline to each product. Create the adapt_pipeline callback that will be used in this fashion. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 4 ++++ drivers/media/platform/atmel/atmel-isc.h | 5 +++++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 12 ++++++++++++ 3 files changed, 21 insertions(+) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c index 6746c9060e3f..a3c299068bd5 100644 --- a/drivers/media/platform/atmel/atmel-isc-base.c +++ b/drivers/media/platform/atmel/atmel-isc-base.c @@ -1047,6 +1047,10 @@ static int isc_try_configure_pipeline(struct isc_device *isc) default: isc->try_config.bits_pipeline = 0x0; } + + /* Tune the pipeline to product specific */ + isc->adapt_pipeline(isc); + return 0; } diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h index 14e318a7373c..19cc60dfcbe0 100644 --- a/drivers/media/platform/atmel/atmel-isc.h +++ b/drivers/media/platform/atmel/atmel-isc.h @@ -236,6 +236,9 @@ struct isc_reg_offsets { * @config_ctrls: pointer to a functoin that initializes product * specific v4l2 controls. * + * @adapt_pipeline: pointer to a function that adapts the pipeline bits + * to the product specific pipeline + * * @offsets: struct holding the product specific register offsets * @controller_formats: pointer to the array of possible formats that the * controller can output @@ -321,6 +324,8 @@ struct isc_device { void (*config_ctrls)(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); + + void (*adapt_pipeline)(struct isc_device *isc); }; struct isc_reg_offsets offsets; diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index a5823a3a6111..b2ace528b260 100644 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c @@ -54,12 +54,17 @@ #define ISC_CLK_MAX_DIV 255 +#define ISC_SAMA5D2_PIPELINE \ + (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ + CBC_ENABLE | SUB422_ENABLE | SUB420_ENABLE) + void isc_sama5d2_config_csc(struct isc_device *isc); void isc_sama5d2_config_cbc(struct isc_device *isc); void isc_sama5d2_config_cc(struct isc_device *isc); void isc_sama5d2_config_dpc(struct isc_device *isc); void isc_sama5d2_config_gam(struct isc_device *isc); void isc_sama5d2_config_rlp(struct isc_device *isc); +void isc_sama5d2_adapt_pipeline(struct isc_device *isc); void isc_sama5d2_config_ctrls(struct isc_device *isc, const struct v4l2_ctrl_ops *ops); @@ -267,6 +272,11 @@ void isc_sama5d2_config_rlp(struct isc_device *isc) ISC_RLP_CFG_MODE_MASK, rlp_mode); } +void isc_sama5d2_adapt_pipeline(struct isc_device *isc) +{ + isc->try_config.bits_pipeline &= ISC_SAMA5D2_PIPELINE; +} + /* Gamma table with gamma 1/2.2 */ const u32 isc_sama5d2_gamma_table[][GAMMA_ENTRIES] = { /* 0 --> gamma 1/1.8 */ @@ -420,6 +430,8 @@ static int atmel_isc_probe(struct platform_device *pdev) isc->config_rlp = isc_sama5d2_config_rlp; isc->config_ctrls = isc_sama5d2_config_ctrls; + isc->adapt_pipeline = isc_sama5d2_adapt_pipeline; + isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET; isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;