| Message ID | 20210429073050.21039-8-peng.fan@oss.nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | soc: imx: gpcv2: support i.MX8MM | expand |
On 29.04.21 09:30, Peng Fan (OSS) wrote: > From: Lucas Stach <l.stach@pengutronix.de> > > Some of the PGC domains only control the handshake with the ADB400 > and don't have any power sequence controls. Make such domains work > by allowing the pxx and map bits to be empty and skip all actions > using those controls. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> > --- > drivers/soc/imx/gpcv2.c | 89 +++++++++++++++++++++++------------------ > 1 file changed, 49 insertions(+), 40 deletions(-) > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c > index 87165619a689..640f4165cfba 100644 > --- a/drivers/soc/imx/gpcv2.c > +++ b/drivers/soc/imx/gpcv2.c > @@ -163,24 +163,27 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) > goto out_regulator_disable; > } > > - /* request the domain to power up */ > - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, > - domain->bits.pxx, domain->bits.pxx); > - /* > - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait > - * for PUP_REQ/PDN_REQ bit to be cleared > - */ > - ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, > - reg_val, !(reg_val & domain->bits.pxx), > - 0, USEC_PER_MSEC); > - if (ret) { > - dev_err(domain->dev, "failed to command PGC\n"); > - goto out_clk_disable; > - } > + if (domain->bits.pxx) { > + /* request the domain to power up */ > + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, > + domain->bits.pxx, domain->bits.pxx); > + /* > + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait > + * for PUP_REQ/PDN_REQ bit to be cleared > + */ > + ret = regmap_read_poll_timeout(domain->regmap, > + GPC_PU_PGC_SW_PUP_REQ, reg_val, > + !(reg_val & domain->bits.pxx), > + 0, USEC_PER_MSEC); > + if (ret) { > + dev_err(domain->dev, "failed to command PGC\n"); > + goto out_clk_disable; > + } > > - /* disable power control */ > - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), > - GPC_PGC_CTRL_PCR, 0); > + /* disable power control */ > + regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), > + GPC_PGC_CTRL_PCR, 0); > + } > > /* request the ADB400 to power up */ > if (domain->bits.hskreq) { > @@ -241,23 +244,26 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) > } > } > > - /* enable power control */ > - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), > - GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); > - > - /* request the domain to power down */ > - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, > - domain->bits.pxx, domain->bits.pxx); > - /* > - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait > - * for PUP_REQ/PDN_REQ bit to be cleared > - */ > - ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, > - reg_val, !(reg_val & domain->bits.pxx), > - 0, USEC_PER_MSEC); > - if (ret) { > - dev_err(domain->dev, "failed to command PGC\n"); > - goto out_clk_disable; > + if (domain->bits.pxx) { > + /* enable power control */ > + regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), > + GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); > + > + /* request the domain to power down */ > + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, > + domain->bits.pxx, domain->bits.pxx); > + /* > + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait > + * for PUP_REQ/PDN_REQ bit to be cleared > + */ > + ret = regmap_read_poll_timeout(domain->regmap, > + GPC_PU_PGC_SW_PDN_REQ, reg_val, > + !(reg_val & domain->bits.pxx), > + 0, USEC_PER_MSEC); > + if (ret) { > + dev_err(domain->dev, "failed to command PGC\n"); > + goto out_clk_disable; > + } > } > > /* Disable reset clocks for all devices in the domain */ > @@ -532,8 +538,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) > > pm_runtime_enable(domain->dev); > > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > - domain->bits.map, domain->bits.map); > + if (domain->bits.map) > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > + domain->bits.map, domain->bits.map); > > ret = pm_genpd_init(&domain->genpd, NULL, true); > if (ret) { > @@ -553,8 +560,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) > out_genpd_remove: > pm_genpd_remove(&domain->genpd); > out_domain_unmap: > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > - domain->bits.map, 0); > + if (domain->bits.map) > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > + domain->bits.map, 0); > pm_runtime_disable(domain->dev); > > return ret; > @@ -567,8 +575,9 @@ static int imx_pgc_domain_remove(struct platform_device *pdev) > of_genpd_del_provider(domain->dev->of_node); > pm_genpd_remove(&domain->genpd); > > - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > - domain->bits.map, 0); > + if (domain->bits.map) > + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, > + domain->bits.map, 0); > > pm_runtime_disable(domain->dev); > >
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 87165619a689..640f4165cfba 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -163,24 +163,27 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) goto out_regulator_disable; } - /* request the domain to power up */ - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, - domain->bits.pxx, domain->bits.pxx); - /* - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait - * for PUP_REQ/PDN_REQ bit to be cleared - */ - ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, - reg_val, !(reg_val & domain->bits.pxx), - 0, USEC_PER_MSEC); - if (ret) { - dev_err(domain->dev, "failed to command PGC\n"); - goto out_clk_disable; - } + if (domain->bits.pxx) { + /* request the domain to power up */ + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, + domain->bits.pxx, domain->bits.pxx); + /* + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait + * for PUP_REQ/PDN_REQ bit to be cleared + */ + ret = regmap_read_poll_timeout(domain->regmap, + GPC_PU_PGC_SW_PUP_REQ, reg_val, + !(reg_val & domain->bits.pxx), + 0, USEC_PER_MSEC); + if (ret) { + dev_err(domain->dev, "failed to command PGC\n"); + goto out_clk_disable; + } - /* disable power control */ - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), - GPC_PGC_CTRL_PCR, 0); + /* disable power control */ + regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), + GPC_PGC_CTRL_PCR, 0); + } /* request the ADB400 to power up */ if (domain->bits.hskreq) { @@ -241,23 +244,26 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd) } } - /* enable power control */ - regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), - GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); - - /* request the domain to power down */ - regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, - domain->bits.pxx, domain->bits.pxx); - /* - * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait - * for PUP_REQ/PDN_REQ bit to be cleared - */ - ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, - reg_val, !(reg_val & domain->bits.pxx), - 0, USEC_PER_MSEC); - if (ret) { - dev_err(domain->dev, "failed to command PGC\n"); - goto out_clk_disable; + if (domain->bits.pxx) { + /* enable power control */ + regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), + GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR); + + /* request the domain to power down */ + regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, + domain->bits.pxx, domain->bits.pxx); + /* + * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait + * for PUP_REQ/PDN_REQ bit to be cleared + */ + ret = regmap_read_poll_timeout(domain->regmap, + GPC_PU_PGC_SW_PDN_REQ, reg_val, + !(reg_val & domain->bits.pxx), + 0, USEC_PER_MSEC); + if (ret) { + dev_err(domain->dev, "failed to command PGC\n"); + goto out_clk_disable; + } } /* Disable reset clocks for all devices in the domain */ @@ -532,8 +538,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) pm_runtime_enable(domain->dev); - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, - domain->bits.map, domain->bits.map); + if (domain->bits.map) + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, domain->bits.map); ret = pm_genpd_init(&domain->genpd, NULL, true); if (ret) { @@ -553,8 +560,9 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) out_genpd_remove: pm_genpd_remove(&domain->genpd); out_domain_unmap: - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, - domain->bits.map, 0); + if (domain->bits.map) + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, 0); pm_runtime_disable(domain->dev); return ret; @@ -567,8 +575,9 @@ static int imx_pgc_domain_remove(struct platform_device *pdev) of_genpd_del_provider(domain->dev->of_node); pm_genpd_remove(&domain->genpd); - regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, - domain->bits.map, 0); + if (domain->bits.map) + regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING, + domain->bits.map, 0); pm_runtime_disable(domain->dev);