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ARM: dts: sun8i: v3s: add pwm controller to v3s dts

Message ID 20210513182000.2068223-1-t.schramm@manjaro.org (mailing list archive)
State New, archived
Headers show
Series ARM: dts: sun8i: v3s: add pwm controller to v3s dts | expand

Commit Message

Tobias Schramm May 13, 2021, 6:20 p.m. UTC
The Allwinner V3s and V3 SoCs feature a pwm controller identical to the
one used in the Allwinner A20.
This commit adds it to the V3s dtsi.

Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Jernej Skrabec May 13, 2021, 7:31 p.m. UTC | #1
Hi!

Dne Ĩetrtek, 13. maj 2021 ob 20:20:00 CEST je Tobias Schramm napisal(a):
> The Allwinner V3s and V3 SoCs feature a pwm controller identical to the
> one used in the Allwinner A20.
> This commit adds it to the V3s dtsi.
> 
> Signed-off-by: Tobias Schramm <t.schramm@manjaro.org>
> ---
>  arch/arm/boot/dts/sun8i-v3s.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-
v3s.dtsi
> index 770f5a25ab4c..22bc5ab4c3ca 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -433,6 +433,14 @@ wdt0: watchdog@1c20ca0 {
>  			clocks = <&osc24M>;
>  		};
>  
> +		pwm: pwm@1c21400 {
> +			compatible = "allwinner,sun7i-a20-pwm";

Add V3s fallback compatible (as a first one) here and document it.

Best regards,
Jernej

> +			reg = <0x01c21400 0xc>;
> +			clocks = <&osc24M>;
> +			#pwm-cells = <3>;
> +			status = "disabled";
> +		};
> +
>  		lradc: lradc@1c22800 {
>  			compatible = "allwinner,sun4i-a10-lradc-
keys";
>  			reg = <0x01c22800 0x400>;
> -- 
> 2.30.1
> 
> 
>
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Patch

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 770f5a25ab4c..22bc5ab4c3ca 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -433,6 +433,14 @@  wdt0: watchdog@1c20ca0 {
 			clocks = <&osc24M>;
 		};
 
+		pwm: pwm@1c21400 {
+			compatible = "allwinner,sun7i-a20-pwm";
+			reg = <0x01c21400 0xc>;
+			clocks = <&osc24M>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		lradc: lradc@1c22800 {
 			compatible = "allwinner,sun4i-a10-lradc-keys";
 			reg = <0x01c22800 0x400>;