| Message ID | 20210513190949.2069235-5-t.schramm@manjaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add missing peripherals to Allwinner V3s/V3 device trees | expand |
Dne četrtek, 13. maj 2021 ob 21:09:49 CEST je Tobias Schramm napisal(a): > The Allwinner V3 SoC features an I2S interface. The I2C peripheral is I2C -> I2S > identical to that in the Allwinner H3 SoC. > This commit adds it to the Allwinner V3 dts. > > Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> > --- > arch/arm/boot/dts/sun8i-v3.dtsi | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i- v3.dtsi > index c279e13583ba..0061c49523f2 100644 > --- a/arch/arm/boot/dts/sun8i-v3.dtsi > +++ b/arch/arm/boot/dts/sun8i-v3.dtsi > @@ -1,10 +1,30 @@ > // SPDX-License-Identifier: (GPL-2.0+ OR MIT) > /* > * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> > + * Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org> It's uncommon to add additional copyrights just for one node, but ok. > */ > > #include "sun8i-v3s.dtsi" > > +/ { > + soc { > + i2s0: i2s@1c22000 { > + #sound-dai-cells = <0>; > + compatible = "allwinner,sun8i-h3- i2s"; You have to add v3s compatible as a fallback (and document it in devicetree documentation). Best regards, Jernej > + reg = <0x01c22000 0x400>; > + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; > + clock-names = "apb", "mod"; > + dmas = <&dma 3>, <&dma 3>; > + dma-names = "rx", "tx"; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2s0_pins>; > + resets = <&ccu RST_BUS_I2S0>; > + status = "disabled"; > + }; > + }; > +}; > + > &ccu { > compatible = "allwinner,sun8i-v3-ccu"; > }; > @@ -25,6 +45,11 @@ external_mdio: mdio@2 { > &pio { > compatible = "allwinner,sun8i-v3-pinctrl"; > > + i2s0_pins: i2s0-pins { > + pins = "PG10", "PG11", "PG12", "PG13"; > + function = "i2s"; > + }; > + > uart1_pg_pins: uart1-pg-pins { > pins = "PG6", "PG7"; > function = "uart1"; > -- > 2.30.1 > > >
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi index c279e13583ba..0061c49523f2 100644 --- a/arch/arm/boot/dts/sun8i-v3.dtsi +++ b/arch/arm/boot/dts/sun8i-v3.dtsi @@ -1,10 +1,30 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> + * Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org> */ #include "sun8i-v3s.dtsi" +/ { + soc { + i2s0: i2s@1c22000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-h3-i2s"; + reg = <0x01c22000 0x400>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; + clock-names = "apb", "mod"; + dmas = <&dma 3>, <&dma 3>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_pins>; + resets = <&ccu RST_BUS_I2S0>; + status = "disabled"; + }; + }; +}; + &ccu { compatible = "allwinner,sun8i-v3-ccu"; }; @@ -25,6 +45,11 @@ external_mdio: mdio@2 { &pio { compatible = "allwinner,sun8i-v3-pinctrl"; + i2s0_pins: i2s0-pins { + pins = "PG10", "PG11", "PG12", "PG13"; + function = "i2s"; + }; + uart1_pg_pins: uart1-pg-pins { pins = "PG6", "PG7"; function = "uart1";
The Allwinner V3 SoC features an I2S interface. The I2C peripheral is identical to that in the Allwinner H3 SoC. This commit adds it to the Allwinner V3 dts. Signed-off-by: Tobias Schramm <t.schramm@manjaro.org> --- arch/arm/boot/dts/sun8i-v3.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)