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Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1ligmy-00E0Om-Vf for linux-arm-kernel@lists.infradead.org; Mon, 17 May 2021 17:12:22 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7BEC06134F; Mon, 17 May 2021 17:12:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1621271540; bh=Q6HdpFb0GslcErGwKHPxrRzkiwWqA7oZGoLDF0CfmXw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WOxY0YqQM7oswu6mD4hR3mgWW6mmoD7+yrp3Yezv6yGl7GUjKj6e+MZkWRXMFDZQN hClMuOfRujieTbJZC5rYx9gRisTWCGooNVaQUaDy7HxXLilnhPAHmMWfgrYSkRFzIN xLBO4/hEveH+bkul4R5VcpXqhCPEkEdfHIgs2/i5+k1D7/XBNl+kSRlVe+C9jAyRUw yrQD4XaNm9TVqJHZQZn5UkZsKT8/a4W+IVrq0IDCPrrY7N6LSOZHsXkNpWVKt8Wm2p XeCdS82dhZP+Ulbnqe1nku5McF+z7+tvLF1dD/W+D1bI5zdeGzEAr9Tvc03K3IUpu1 xGzCUGQE2OLPA== From: abelvesa@kernel.org To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Jacky Bai , Dong Aisheng Cc: NXP Linux Team , devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-arm-kernel@lists.infradead.org, Abel Vesa Subject: [PATCH 4/7] arm64: dts: freescale: Add the imx8dxl connectivity subsys dtsi Date: Mon, 17 May 2021 20:12:02 +0300 Message-Id: <20210517171205.1581938-5-abelvesa@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210517171205.1581938-1-abelvesa@kernel.org> References: <20210517171205.1581938-1-abelvesa@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210517_101221_082757_FEF857CC X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jacky Bai On i.MX8DXL, the Connectivity subsystem includes below peripherals: 1x ENET with AVB support, 1x ENET with TSN support, 2x USB OTG, 1x eMMC, 2x SD, 1x NAND. Signed-off-by: Jacky Bai Signed-off-by: Abel Vesa --- .../boot/dts/freescale/imx8dxl-ss-conn.dtsi | 133 ++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi new file mode 100644 index 000000000000..c10801926de3 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019-2021 NXP + */ + +/delete-node/ &enet1_lpcg; +/delete-node/ &fec2; + +&conn_subsys { + conn_enet0_root_clk: clock-conn-enet0-root { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + clock-output-names = "conn_enet0_root_clk"; + }; + + eqos: ethernet@5b050000 { + compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a"; + reg = <0x5b050000 0x10000>; + interrupt-parent = <&gic>; + interrupts = , + ; + interrupt-names = "eth_wake_irq", "macirq"; + clocks = <&eqos_lpcg 2>, + <&eqos_lpcg 4>, + <&eqos_lpcg 0>, + <&eqos_lpcg 3>, + <&eqos_lpcg 1>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem"; + assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <125000000>; + power-domains = <&pd IMX_SC_R_ENET_1>; + clk_csr = <0>; + status = "disabled"; + }; + + usbotg2: usb@5b0e0000 { + compatible = "fsl,imx8dxl-usb", "fsl,imx7ulp-usb"; + reg = <0x5b0e0000 0x200>; + interrupt-parent = <&gic>; + interrupts = ; + fsl,usbphy = <&usbphy2>; + fsl,usbmisc = <&usbmisc2 0>; + /* + * usbotg1 and usbotg2 share one clcok + * scfw disable clock access and keep it always on + * in case other core (M4) use one of these. + */ + clocks = <&clk_dummy>; + ahb-burst-config = <0x0>; + tx-burst-size-dword = <0x10>; + rx-burst-size-dword = <0x10>; + #stream-id-cells = <1>; + power-domains = <&pd IMX_SC_R_USB_1>; + status = "disabled"; + }; + + usbmisc2: usbmisc@5b0e0200 { + #index-cells = <1>; + compatible = "fsl,imx8dxl-usbmisc", "fsl,imx7ulp-usbmisc"; + reg = <0x5b0e0200 0x200>; + }; + + usbphy2: usbphy@0x5b110000 { + compatible = "fsl,imx8dxl-usbphy", "fsl,imx7ulp-usbphy"; + reg = <0x5b110000 0x1000>; + clocks = <&usb2_2_lpcg 0>; + status = "disabled"; + }; + + eqos_lpcg: clock-controller@5b240000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b240000 0x10000>; + #clock-cells = <1>; + clocks = <&conn_enet0_root_clk>, + <&conn_axi_clk>, + <&conn_axi_clk>, + <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, + <&conn_ipg_clk>; + bit-offset = <0 8 16 20 24>; + clock-output-names = "eqos_ptp", + "eqos_mem_clk", + "eqos_aclk", + "eqos_clk", + "eqos_csr_clk"; + power-domains = <&pd IMX_SC_R_ENET_1>; + }; + + usb2_2_lpcg: clock-controller@5b280000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b280000 0x10000>; + #clock-cells = <1>; + + bit-offset = <28>; + clocks = <&conn_ipg_clk>; + clock-output-names = "usboh3_2_phy_ipg_clk"; + }; + +}; + +&enet0_lpcg { + clocks = <&conn_enet0_root_clk>, + <&conn_enet0_root_clk>, + <&conn_axi_clk>, + <&clk IMX_SC_R_ENET_0 IMX_SC_C_TXCLK>, + <&conn_ipg_clk>, + <&conn_ipg_clk>; +}; + +&fec1 { + compatible = "fsl,imx8dxl-fec", "fsl,imx8qm-fec"; + interrupts = , + , + , + ; + assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>; + assigned-clock-rates = <125000000>; +}; + +&usdhc1 { + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; + interrupts = ; +}; + +&usdhc2 { + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; + interrupts = ; +}; + +&usdhc3 { + compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; + interrupts = ; +};