Message ID | 20210518062630.144154-1-vaibhavgupta40@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2] arm64: dts: ti: k3-am64-main: Enable crypto accelerator | expand |
On 11:56-20210518, Vaibhav Gupta wrote: > From: Vaibhav Gupta <v_gupta@ti.com> > > Add the node for SA2UL including the random number generator. > > [v_gupta@ti.com: Add address ranges entry in cbass_main] > Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > Signed-off-by: Vaibhav Gupta <v_gupta@ti.com> I see that you have missed the series Suman posted in [1]. It has a few cleanups of interest. > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 25 ++++++++++++++++++++++++ > arch/arm64/boot/dts/ti/k3-am64.dtsi | 1 + > 2 files changed, 26 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index 25b702303637..adbc3c0673f3 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -160,6 +160,31 @@ k3_reset: reset-controller { > }; > }; > > + main_crypto: crypto@40900000 { > + compatible = "ti,am64-sa2ul"; > + reg = <0x0 0x40900000 0x0 0x1200>; > + power-domains = <&k3_pds 133 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 133 0>, <&k3_clks 133 1>, <&k3_clks 133 2>; > + clock-names = "pka_in_clk" , "x1_clk" , "x2_clk"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0x0 0x040900000 0x00 0x040900000 0x0 0x30000>; > + > + status = "okay"; drop this.. > + > + dmas = <&main_pktdma 0xc001 15>, <&main_pktdma 0x4002 15>, > + <&main_pktdma 0x4003 15>; > + dma-names = "tx", "rx1", "rx2"; > + > + eip76d_rng: rng@40910000 { > + compatible = "inside-secure,safexcel-eip76"; > + reg = <0x0 0x40910000 0x0 0x80>; > + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&k3_clks 133 2>; > + clock-names = "x2_clk"; > + }; > + }; > + > main_pmx0: pinctrl@f4000 { > compatible = "pinctrl-single"; > reg = <0x00 0xf4000 0x00 0x2d0>; > diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi > index 0ae8c844c482..e2bea44a16c5 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi > @@ -85,6 +85,7 @@ cbass_main: bus@f4000 { > <0x00 0x78000000 0x00 0x78000000 0x00 0x00800000>, /* Main R5FSS */ > <0x06 0x00000000 0x06 0x00000000 0x01 0x00000000>, /* PCIe DAT1 */ > <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */ > + <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2UL */ > > /* MCU Domain Range */ > <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; I think you might have missed the discussion here:[1] a) Could I suggest you co-ordinate with Suman as to which series should I consider? Suman's looks a lot complete.. b) Considering the potential for TF-A booting Linux without u-boot on HS devices, may I suggest making sure that the dts board files for evm have the nodes disabled by default? [1] https://lore.kernel.org/linux-arm-kernel/20210514221148.m42zldo6lfxn5l4m@underfed/
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 25b702303637..adbc3c0673f3 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -160,6 +160,31 @@ k3_reset: reset-controller { }; }; + main_crypto: crypto@40900000 { + compatible = "ti,am64-sa2ul"; + reg = <0x0 0x40900000 0x0 0x1200>; + power-domains = <&k3_pds 133 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 133 0>, <&k3_clks 133 1>, <&k3_clks 133 2>; + clock-names = "pka_in_clk" , "x1_clk" , "x2_clk"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x040900000 0x00 0x040900000 0x0 0x30000>; + + status = "okay"; + + dmas = <&main_pktdma 0xc001 15>, <&main_pktdma 0x4002 15>, + <&main_pktdma 0x4003 15>; + dma-names = "tx", "rx1", "rx2"; + + eip76d_rng: rng@40910000 { + compatible = "inside-secure,safexcel-eip76"; + reg = <0x0 0x40910000 0x0 0x80>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&k3_clks 133 2>; + clock-names = "x2_clk"; + }; + }; + main_pmx0: pinctrl@f4000 { compatible = "pinctrl-single"; reg = <0x00 0xf4000 0x00 0x2d0>; diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi index 0ae8c844c482..e2bea44a16c5 100644 --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi @@ -85,6 +85,7 @@ cbass_main: bus@f4000 { <0x00 0x78000000 0x00 0x78000000 0x00 0x00800000>, /* Main R5FSS */ <0x06 0x00000000 0x06 0x00000000 0x01 0x00000000>, /* PCIe DAT1 */ <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */ + <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2UL */ /* MCU Domain Range */ <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>;