From patchwork Fri May 21 10:48:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaxson Han X-Patchwork-Id: 12272915 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A01CEC433B4 for ; Fri, 21 May 2021 10:52:33 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E9E06108D for ; Fri, 21 May 2021 10:52:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2E9E06108D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=SsmQiASAnNcns3537oVqwums4eBuwsrENRQESTcJoQE=; b=V9DC9iuCtSxgDYMI0HFOAB23++ s5Kup4hBYUeF675+XD7QaXL1AMZs/TUHY7ODGZSnHRMYu76JE1BSOXNsk6vyzCCFHZqb2Cq/Glu+q IwwudQMm4NwyuPVcpCw5hAmKeox+952nIB8mTkNNfKhtQj5EIHuy2uwQJIWScnaDo6A9FjoONlBHE gs86YUJF7LZuxqlRQhlG41Z8TTKYIbXSotfs9KkrvSrhcAkhVrxgmH+zs1YNsKoT0TQ0MuF8aw7Nn C1zKMbgi+52bNjapvLrQcIB/tVQO57iz2ZOd97py2CjS8uNm5bNLciwaBsYxjnAGvz8SA0xUnPjkT lLPAdgpg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lk2jO-0050r5-CF; Fri, 21 May 2021 10:50:14 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lk2hw-00509K-F3 for linux-arm-kernel@desiato.infradead.org; Fri, 21 May 2021 10:48:44 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender :Reply-To:Content-Type:Content-ID:Content-Description; bh=JksnVY4Th+H3URaFlvzWbCgIM9rDZOF5tvGoKmGwd4U=; b=gfnFkt1ZDrtCowgm7LshRfc8Yu bi3M8MXS8Bf0cCAWZL0+uNrqDfr+tOzU5Z+GqH+mXDl73nW5luStj0Oxgp2HAhTq9BlXcCQNmU1l+ iMkx+Ia2m2TIyTKI4BW70BUKDhwDVLDMB6efpxq/O8GN3T/sUUpqF5+iFnyu7/NI1vGctHqKPncJt J8KyUprtcxC3N3SKWTa6jwQfl4VroZvBSuui/l09Bpp6XfsEu8PjNbj1gWFkopST2TuwVuc0lFV34 BOipcHFGtUbxjPDfAeEex453e4lhOv7QWftB2hYC5jU4BiI8506S/sAJLfTzJgn9IZN/CrTfmeMdT 7HkeYoXA==; Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lk2ht-00H3AS-DV for linux-arm-kernel@lists.infradead.org; Fri, 21 May 2021 10:48:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F29F91424; Fri, 21 May 2021 03:48:39 -0700 (PDT) Received: from optiplex-7070.shanghai.arm.com (optiplex-7070.shanghai.arm.com [10.169.188.115]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 27BC93F73D; Fri, 21 May 2021 03:48:37 -0700 (PDT) From: Jaxson Han To: mark.rutland@arm.com, andre.przywara@arm.com Cc: linux-arm-kernel@lists.infradead.org, wei.chen@arm.com, jaxson.han@arm.com Subject: [boot-wrapper PATCH v2 8/8] aarch64: Introduce EL2 boot code for Armv8-R AArch64 Date: Fri, 21 May 2021 18:48:07 +0800 Message-Id: <20210521104807.138269-9-jaxson.han@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210521104807.138269-1-jaxson.han@arm.com> References: <20210521104807.138269-1-jaxson.han@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210521_034841_573205_52B7EF0A X-CRM114-Status: GOOD ( 15.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Armv8-R AArch64 profile does not support the EL3 exception level. The Armv8-R AArch64 profile allows for an (optional) VMSAv8-64 MMU at EL1, which allows to run off-the-shelf Linux. However EL2 only supports a PMSA, which is not supported by Linux, so we need to drop into EL1 before entering the kernel. We add a new err_invalid_arch symbol as a dead loop. If we detect the current Armv8-R aarch64 only supports with PMSA, meaning we cannot boot Linux anymore, then we jump to err_invalid_arch. During Armv8-R aarch64 init, to make sure nothing unexpected traps into EL2, we auto-detect and config FIEN and EnSCXT in HCR_EL2. The boot sequence is: If CurrentEL == EL3, then goto EL3 initialisation and drop to lower EL before entering the kernel. If CurrentEL == EL2 && id_aa64mmfr0_el1.MSA == 0xf (Armv8-R aarch64), if id_aa64mmfr0_el1.MSA_frac == 0x2, then goto Armv8-R AArch64 initialisation and drop to EL1 before entering the kernel. else, which means VMSA unsupported and cannot boot Linux, goto err_invalid_arch (dead loop). Else, no initialisation and keep the current EL before entering the kernel. Signed-off-by: Jaxson Han --- arch/aarch64/boot.S | 87 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 85 insertions(+), 2 deletions(-) diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S index 14fd9cf..0339e19 100644 --- a/arch/aarch64/boot.S +++ b/arch/aarch64/boot.S @@ -25,16 +25,24 @@ _start: * Boot sequence * If CurrentEL == EL3, then goto EL3 initialisation and drop to * lower EL before entering the kernel. + * If CurrentEL == EL2 && id_aa64mmfr0_el1.MSA == 0xf, then + * If id_aa64mmfr0_el1.MSA_frac == 0x2, then goto + * Armv8-R AArch64 initialisation and drop to EL1 before + * entering the kernel. + * Else, which means VMSA unsupported and cannot boot Linux, + * goto err_invalid_arch (dead loop). * Else, no initialisation and keep the current EL before * entering the kernel. */ mrs x0, CurrentEL - cmp x0, #CURRENTEL_EL3 - beq el3_init + cmp x0, #CURRENTEL_EL2 + bgt el3_init + beq el2_init /* * We stay in the current EL for entering the kernel */ +keep_el: mov w0, #1 ldr x1, =flag_keep_el str w0, [x1] @@ -127,6 +135,80 @@ el3_init: str w0, [x1] b el_max_init + /* + * EL2 Armv8-R AArch64 initialisation + */ +el2_init: + /* Detect Armv8-R AArch64 */ + mrs x1, id_aa64mmfr0_el1 + /* + * Check MSA, bits [51:48]: + * 0xf means Armv8-R AArch64. + * If not 0xf, goto keep_el. + */ + ubfx x0, x1, #48, #4 // MSA + cmp x0, 0xf + bne keep_el + /* + * Check MSA_frac, bits [55:52]: + * 0x2 means EL1&0 translation regime also supports VMSAv8-64. + */ + ubfx x0, x1, #52, #4 // MSA_frac + cmp x0, 0x2 + /* If not 0x2, no VMSA, so cannot boot Linux and dead loop. */ + bne err_invalid_arch + + mrs x0, midr_el1 + msr vpidr_el2, x0 + + mrs x0, mpidr_el1 + msr vmpidr_el2, x0 + + mov x0, #(1 << 31) // VTCR_MSA: VMSAv8-64 support + msr vtcr_el2, x0 + + /* Init HCR_EL2 */ + mov x0, #(1 << 31) // RES1 + + mrs x1, id_aa64pfr0_el1 + ubfx x2, x1, #56, 4 + cmp x2, 0x2 + bne 1f + /* + * Disable trap when accessing SCTXNUM_EL0 or SCTXNUM_EL1 + * if FEAT_CSV2. + */ + orr x0, x0, #(1 << 53) // EnSCXT + +1: ubfx x2, x1, #28, 4 + cmp x2, 0x2 + bne 1f + /* Disable trap when accessing ERXPFGCDN_EL1 if FEAT_RASv1p1. */ + orr x0, x0, #(1 << 47) // FIEN + + /* Enable pointer authentication if present */ +1: mrs x1, id_aa64isar1_el1 + /* + * If ID_AA64ISAR1_EL1.{GPI, GPA, API, APA} == {0000, 0000, 0000, 0000} + * then HCR_EL2.APK and HCR_EL2.API are RES 0. + * Else + * set HCR_EL2.APK and HCR_EL2.API. + */ + ldr x2, =(((0xff) << 24) | (0xff << 4)) + and x1, x1, x2 + cbz x1, 1f + + orr x0, x0, #(1 << 40) // APK + orr x0, x0, #(1 << 41) // API + +1: msr hcr_el2, x0 + isb + + mov w0, #SPSR_KERNEL_EL1 + ldr x1, =spsr_to_elx + str w0, [x1] + // fall through + el_max_init: ldr x0, =CNTFRQ msr cntfrq_el0, x0 @@ -136,6 +218,7 @@ el_max_init: b start_el_max err_invalid_id: +err_invalid_arch: b . /*