From patchwork Mon May 24 12:20:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chun-Jie Chen X-Patchwork-Id: 12276891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B678C04FF3 for ; Mon, 24 May 2021 19:37:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3EE2A61405 for ; Mon, 24 May 2021 19:37:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3EE2A61405 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4F9G5dnuKBtACjfNkJu8pdNlJpSjuuiNSvzj8ayiIBE=; b=qQE6sRCsADmPXx xsvHr6fhkYw7NQp3JZPT66L6cYzbhBpA9fE4ROGOgX14TGmf7Ng0UmPrX+zP5bwK4SxutcOnumrg2 4YWAJiQZa0YpmzLwODBOSC13Ob2Ql7jl9XF46Z3hwVq1Aix/A6kShsXVLiy9Nw1QWvxemDtWPXypb ZJ6Z0plpB9Rxk1HP7B5vOwghw6GWX/eG2Y8zQMp6Z52peBTs2FpMG+i5Nkcb686j98vZUOHJC0wWm r1cOntMg1o+JxX+nQq31Z6lhqATbIUVJ6TnEBEyt4gR5+NVau2ezd1A5opLkLDSImoyYQT2wEGigw Ynb37E8awdT8NS/cLQ6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1llGMH-001hG7-T7; Mon, 24 May 2021 19:35:29 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1ll9re-000uwI-9u; Mon, 24 May 2021 12:39:23 +0000 X-UUID: 1a15ac8b46474726ac095295c2aab82d-20210524 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=QvtKCMBBQcoNWh9/sXHAdCGTJLRvd7H6GdGx4BD6lsY=; b=VgVsoy6YbCfQjoSHYGM8yzzIL+WhbaAKlbNnNd5tWP9fNCpmmwiBPZFbJY1v3Usnb9QArV9UqdlOIoe7THjovh+GsoXM7wGli1+29uvl6uQuPxQsfdTaT3VAtpyh8eH/ysx9/mZSIZRdx+b1RHUVaexBe160XBWQEyuBBv/DHgw=; X-UUID: 1a15ac8b46474726ac095295c2aab82d-20210524 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1396489901; Mon, 24 May 2021 05:39:13 -0700 Received: from MTKMBS06N2.mediatek.inc (172.21.101.130) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 24 May 2021 05:29:12 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 24 May 2021 20:29:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 24 May 2021 20:29:10 +0800 From: Chun-Jie Chen To: Matthias Brugger , Stephen Boyd , Nicolas Boichat , Rob Herring CC: , , , , , , , Weiyi Lu , "chun-jie . chen" Subject: [PATCH v9 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Date: Mon, 24 May 2021 20:20:34 +0800 Message-ID: <20210524122053.17155-4-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210524122053.17155-1-chun-jie.chen@mediatek.com> References: <20210524122053.17155-1-chun-jie.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_053922_370890_60141FF7 X-CRM114-Status: GOOD ( 14.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds the new binding documentation of msdc controller for Mediatek MT8192. Signed-off-by: Weiyi Lu Signed-off-by: chun-jie.chen --- .../bindings/arm/mediatek/mediatek,msdc.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml new file mode 100644 index 000000000000..10eb43de2d2b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MSDC Controller + +maintainers: + - Chun-Jie Chen + +description: + The Mediatek msdc controller provides functional configurations and clocks to the system. + +properties: + compatible: + items: + - enum: + - mediatek,mt8192-msdc + - mediatek,mt8192-msdc_top + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + msdc: syscon@11f60000 { + compatible = "mediatek,mt8192-msdc", "syscon"; + reg = <0x11f60000 0x1000>; + #clock-cells = <1>; + }; + + - | + msdc_top: syscon@11f10000 { + compatible = "mediatek,mt8192-msdc_top", "syscon"; + reg = <0x11f10000 0x1000>; + #clock-cells = <1>; + };