| Message ID | 20210529034138.83384-3-wangkefeng.wang@huawei.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: fix PXN process with LPAE feature | expand |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 81cf3e6e2a3d..a6ada914cdf5 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -241,8 +241,13 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) vm_flags = VM_WRITE; } - if (fsr & FSR_LNX_PF) + if (fsr & FSR_LNX_PF) { vm_flags = VM_EXEC; +#ifdef CONFIG_ARM_LPAE + if (addr < TASK_SIZE && !user_mode(regs)) + __do_kernel_fault(mm, addr, fsr, regs); +#endif + } perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
If we support PXN feature, should panic when user code execution with privilege mode, but it is not true when LAPE enabled, let's fix it by adding the check in do_page_fault(). Fixes: 1d4d37159d01 ("ARM: 8235/1: Support for the PXN CPU feature on ARMv7") Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> --- arch/arm/mm/fault.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)