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Wed, 9 Jun 2021 05:53:01 +0000 Received: from xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 8 Jun 2021 22:52:58 -0700 Received: from smtp.xilinx.com (172.19.127.96) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Tue, 8 Jun 2021 22:52:58 -0700 Received: from [10.140.6.60] (port=51918 helo=xhdnavam40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lqr96-0007H3-UP; Tue, 08 Jun 2021 22:52:57 -0700 From: Nava kishore Manne To: , , , , , , , , , , , , , , , , , , , , Subject: [RFC v2 3/4] drivers: fpga: Add user-key encrypted FPGA Image loading support Date: Wed, 9 Jun 2021 11:22:31 +0530 Message-ID: <20210609055232.4501-4-nava.manne@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210609055232.4501-1-nava.manne@xilinx.com> References: <20210609055232.4501-1-nava.manne@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0a3b60f2-2f23-42b7-9495-08d92b0ad748 X-MS-TrafficTypeDiagnostic: BYAPR02MB5255: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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CAT:NONE; SFS:(4636009)(136003)(346002)(39860400002)(396003)(376002)(36840700001)(46966006)(36906005)(82310400003)(82740400003)(7416002)(478600001)(2616005)(8936002)(1076003)(7696005)(316002)(186003)(26005)(70206006)(336012)(921005)(83380400001)(5660300002)(110136005)(2906002)(426003)(47076005)(356005)(36860700001)(36756003)(7636003)(6666004)(70586007)(8676002)(9786002)(102446001)(83996005)(2101003); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2021 05:53:01.0361 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0a3b60f2-2f23-42b7-9495-08d92b0ad748 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0033.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR02MB5255 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210608_225305_470391_9639FBAB X-CRM114-Status: GOOD ( 13.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds user-key encrypted FPGA Image loading support to the framework. Signed-off-by: Nava kishore Manne --- Changes for v2: -Both DT properties ie; encrypted-key-name and encrypted-user-key-fpga-config are targeted to use for the same use cases but ideally encrypted-key-name is enough to serve the purpose so updated the code to remove the unwanted encrypted-user-key-fpga-config property dependency as suggested by Rob drivers/fpga/fpga-mgr.c | 15 +++++++++++++++ drivers/fpga/of-fpga-region.c | 11 +++++++++++ include/linux/fpga/fpga-mgr.h | 7 +++++++ 3 files changed, 33 insertions(+) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index b85bc47c91a9..3e79ab8cc86f 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -325,6 +325,7 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, const char *image_name) { struct device *dev = &mgr->dev; + const struct firmware *enc_fw; const struct firmware *fw; int ret; @@ -339,8 +340,22 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, return ret; } + if (info->encrypted_key_name) { + ret = request_firmware(&enc_fw, info->encrypted_key_name, dev); + if (ret) { + mgr->state = FPGA_MGR_STATE_FIRMWARE_REQ_ERR; + dev_err(dev, "Error requesting firmware %s\n", + info->encrypted_key_name); + return ret; + } + info->enc_key_buf = enc_fw->data; + info->enc_key_buf_size = enc_fw->size; + } + ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size); + if (info->encrypted_key_name) + release_firmware(enc_fw); release_firmware(fw); return ret; diff --git a/drivers/fpga/of-fpga-region.c b/drivers/fpga/of-fpga-region.c index e405309baadc..88d8c9049a2f 100644 --- a/drivers/fpga/of-fpga-region.c +++ b/drivers/fpga/of-fpga-region.c @@ -195,6 +195,7 @@ static struct fpga_image_info *of_fpga_region_parse_ov( { struct device *dev = ®ion->dev; struct fpga_image_info *info; + const char *encrypted_key_name; const char *firmware_name; int ret; @@ -228,6 +229,16 @@ static struct fpga_image_info *of_fpga_region_parse_ov( if (of_property_read_bool(overlay, "encrypted-fpga-config")) info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM; + if (!of_property_read_string(overlay, "encrypted-key-name", + &encrypted_key_name)) { + info->encrypted_key_name = + devm_kstrdup(dev, encrypted_key_name, GFP_KERNEL); + if (!info->encrypted_key_name) + return ERR_PTR(-ENOMEM); + + info->flags |= FPGA_MGR_ENCRYPTED_USER_KEY_BITSTREAM; + } + if (!of_property_read_string(overlay, "firmware-name", &firmware_name)) { info->firmware_name = devm_kstrdup(dev, firmware_name, diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 3a32b8e20185..ff14bc51bdd3 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,12 +67,15 @@ enum fpga_mgr_states { * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed + * %FPGA_MGR_ENCRYPTED_USER_KEY_BITSTREAM: indicates bitstream is encrypted + * with user-key */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) +#define FPGA_MGR_ENCRYPTED_USER_KEY_BITSTREAM BIT(5) /** * struct fpga_image_info - information specific to a FPGA image @@ -82,6 +85,7 @@ enum fpga_mgr_states { * @config_complete_timeout_us: maximum time for FPGA to switch to operating * status in the write_complete op. * @firmware_name: name of FPGA image firmware file + * @encrypted_key_name: name of the FPGA image encrypted user-key file * @sgt: scatter/gather table containing FPGA image * @buf: contiguous buffer containing FPGA image * @count: size of buf @@ -95,8 +99,11 @@ struct fpga_image_info { u32 disable_timeout_us; u32 config_complete_timeout_us; char *firmware_name; + char *encrypted_key_name; struct sg_table *sgt; + const char *enc_key_buf; const char *buf; + size_t enc_key_buf_size; size_t count; int region_id; struct device *dev;