From patchwork Wed Jun 9 08:01:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12309263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3C80C48BCF for ; Wed, 9 Jun 2021 08:16:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A055061359 for ; Wed, 9 Jun 2021 08:16:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A055061359 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lenp+Dki6YIZVk+K+WR5xuius5jXWnfUsO58Fzz9C38=; b=XRyjJ9DLnOpkoC 3QdBVRJwUJ/O7JXi7HyrrjlmlREa5G81gy5jWZZUJ7XYfbXok20ykWjmERJ+8RfILnufQYqquNY5T waeCHqjvxaHxExu8Yp9dcxOZL34kuT7K7AaWK8oKY2rvmbc53JeIjg0hdzjRaVdTwxPO4AheebCpR iRpr33xUcqXb+CqrUbEPtzDpZZD50o1emdArCADH5krzkWDY5DUlRJoze5WV4vII5j568gEbi/eqy M9iKyGintitZVy5rCnFwoT/tfeXdnWXaEbsitL1Y34Cq4Qmji4xws/lPInf+GbKk1MYZN8vSiCNJg UmMLeWKpOeKNSWrO8dNg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lqtLx-00CJtu-Ke; Wed, 09 Jun 2021 08:14:22 +0000 Received: from relay12.mail.gandi.net ([217.70.178.232]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lqt9b-00CEzS-Mj; Wed, 09 Jun 2021 08:01:37 +0000 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id 136D5200017; Wed, 9 Jun 2021 08:01:32 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , , Rob Herring , , Krzysztof Kozlowski Cc: Michal Simek , Naga Sureshkumar Relli , Amit Kumar Mahapatra , Thomas Petazzoni , , , helmut.grohne@intenta.de, Srinivas Goud , Siva Durga Prasad Paladugu , Miquel Raynal Subject: [PATCH v22 08/18] dt-binding: memory: pl353-smc: Enhance the description of the reg property Date: Wed, 9 Jun 2021 10:01:02 +0200 Message-Id: <20210609080112.1753221-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210609080112.1753221-1-miquel.raynal@bootlin.com> References: <20210609080112.1753221-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210609_010135_931743_AA805B75 X-CRM114-Status: UNSURE ( 9.94 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The SMC bus controller features several register sets. The one pointed by the reg property is for the SMC configuration (impacts the sub-controllers configuration), while the others are meant to be used to send regular cycles on the memory bus (eg. CMD, ADDR, DATA for a NAND device). Detail this a little bit for the sake of clarity. Signed-off-by: Miquel Raynal --- .../devicetree/bindings/memory-controllers/pl353-smc.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt index ecd46856f139..ba6a5426f62b 100644 --- a/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/pl353-smc.txt @@ -5,7 +5,8 @@ of memory interfaces: NAND and memory mapped interfaces (such as SRAM or NOR). Required properties: - compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell". -- reg : Controller registers map and length. +- reg : SMC controller and sub-controllers configuration + registers. - clock-names : List of input clock names - "memclk", "apb_pclk" (See clock bindings for details). - clocks : Clock phandles (see clock bindings for details).