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Mon, 21 Jun 2021 00:25:13 -0700 (PDT) From: Jagan Teki To: Peng Fan , Shawn Guo , Sascha Hauer , Tomasz Figa , Fancy Fang Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Anthony Brandon , Francis Laniel , Matteo Lisi , Milco Pratesi , Jagan Teki Subject: [RFC PATCH 5/9] soc: imx8mm: blk-ctl: Add MIPI DPHY reset enable Date: Mon, 21 Jun 2021 12:54:20 +0530 Message-Id: <20210621072424.111733-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621072424.111733-1-jagan@amarulasolutions.com> References: <20210621072424.111733-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210621_002514_686988_9483F7E2 X-CRM114-Status: GOOD ( 13.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add MIPI DPHY reset enable pin in blk-ctl driver for i.MX8MM. Signed-off-by: Jagan Teki --- drivers/soc/imx/blk-ctl-imx8mm.c | 4 ++++ include/dt-bindings/power/imx8mm-power.h | 5 +++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c index 5ca8d6c52917..a9d900754faf 100644 --- a/drivers/soc/imx/blk-ctl-imx8mm.c +++ b/drivers/soc/imx/blk-ctl-imx8mm.c @@ -25,6 +25,7 @@ #define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN BIT(4) #define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN BIT(3) #define MEDIA_BLK_CSI_BRIDGE_SFT_EN GENMASK(2, 0) +#define MEDIA_BLK_GPR_MIPI_M_RESETN BIT(17) #define MEDIA_BLK_BUS_PD_MASK BIT(12) #define MEDIA_BLK_MIPI_CSI_PD_MASK GENMASK(11, 10) @@ -41,6 +42,9 @@ static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = { IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4, MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN, IMX_BLK_CTL_PD_RESET), + IMX_BLK_CTL_PD("DPHY", "dphy", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DPHY, 0x4, + MEDIA_BLK_MIPI_DSI_PD_MASK, 0x8, MEDIA_BLK_GPR_MIPI_M_RESETN, + IMX_BLK_CTL_PD_RESET), IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4, MEDIA_BLK_MIPI_CSI_PD_MASK, 0, MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN, diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h index a10266befa9c..8becb123e191 100644 --- a/include/dt-bindings/power/imx8mm-power.h +++ b/include/dt-bindings/power/imx8mm-power.h @@ -27,7 +27,8 @@ #define IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE 0 #define IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF 1 #define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI 2 -#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI 3 -#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX 4 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DPHY 3 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI 4 +#define IMX8MM_BLK_CTL_PD_DISPMIX_MAX 5 #endif