From patchwork Thu Jun 24 02:11:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mason Zhang X-Patchwork-Id: 12340703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B7A72C48BC2 for ; Thu, 24 Jun 2021 02:28:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7CE4E613B2 for ; Thu, 24 Jun 2021 02:28:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7CE4E613B2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=bpsBDLNmdGJSJzfO9zNP8uc39qKeFyc084DsBMDvN6s=; b=hBYLG75aFwAml7 ELcxWzLQBjRPyPfALGcBe4F33z38HVa9C9sKat/AS3xQb6tFRXb0RxrVVIJlTAz9Wr4+MqfXwRK4z PvHhUU9VlRZBk5WJffUPrmZ4+cuFQ/0o/FpyP43H/414eI9p2vKpfYde77XltMQp+709uaGvXSsRq fsuOzHqhU4c4LKjepXl+zRla9DqTSYydZvwd8BLYEnFvAjKBSjswrefdZgrzsJUot8NEOEY04m0Eb fj1qxJ2pV5B4/RbJu4wlMzVy3KQEF+x8ZmXLhd/+lMhEFR1YAJquHCe4n9KvmMONnOj1DLM+qWK/n TM7/dZTdrJTY5OdJAlzg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lwF4z-00CQHw-FG; Thu, 24 Jun 2021 02:26:57 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lwF4s-00CQGa-OW; Thu, 24 Jun 2021 02:26:55 +0000 X-UUID: ae2fa5061f5f4bb8885f50943314a387-20210623 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=+dP0lF1MqHc4d/D3DVKON5unIj7sATG7uGXhoFthy4Q=; b=Lejy5+Az/IP9jqmaKlOxlygeC5RUfv9DosmU3esXfgV9g5fQLPrib31c6fnb5kUDEyg4109FhU8/GkhqYId3Rt9+Qog/LuvOSI0pVoabvVA3eKxHLGZVlcPrxL/XY3KEsBcgv84uqbfcj2gqUKu6qBhKd7LLaHODl4oaBDskxkU=; X-UUID: ae2fa5061f5f4bb8885f50943314a387-20210623 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1542597782; Wed, 23 Jun 2021 19:26:47 -0700 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 23 Jun 2021 19:26:45 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 24 Jun 2021 10:26:44 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 24 Jun 2021 10:26:43 +0800 From: Mason Zhang To: Rob Herring , Matthias Brugger CC: , , , , , Mason Zhang Subject: [PATCH v4 1/1] arm64: dts: mediatek: add MT6779 spi master dts node Date: Thu, 24 Jun 2021 10:11:37 +0800 Message-ID: <20210624021137.11513-1-mason.zhang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210623_192653_518796_72B9C5AC X-CRM114-Status: UNSURE ( 9.25 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Mason Zhang This patch add spi master dts node for MT6779 SOC. Signed-off-by: Mason Zhang --- arch/arm64/boot/dts/mediatek/mt6779.dtsi | 112 +++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt6779.dtsi b/arch/arm64/boot/dts/mediatek/mt6779.dtsi index 370f309d32de..c81e76865d1b 100644 --- a/arch/arm64/boot/dts/mediatek/mt6779.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6779.dtsi @@ -219,6 +219,118 @@ status = "disabled"; }; + spi0: spi0@1100a000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x1100a000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI0>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi1: spi1@11010000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x11010000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI1>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi2: spi2@11012000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x11012000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI2>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi3: spi3@11013000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x11013000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI3>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi4: spi4@11018000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x11018000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI4>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi5: spi5@11019000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x11019000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI5>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi6: spi6@1101d000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x1101d000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI6>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + + spi7: spi7@1101e000 { + compatible = "mediatek,mt6779-spi", + "mediatek,mt6765-spi"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,pad-select = <0>; + reg = <0 0x1101e000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_MAINPLL_D5_D2>, + <&topckgen CLK_TOP_SPI>, + <&infracfg_ao CLK_INFRA_SPI7>; + clock-names = "parent-clk", "sel-clk", "spi-clk"; + }; + audio: clock-controller@11210000 { compatible = "mediatek,mt6779-audio", "syscon"; reg = <0 0x11210000 0 0x1000>;